Home of the iDMA - a modular, parametrizable, and highly flexible Data Movement Accelerator (DMA) architecture targeting a wide range of platforms from ultra-low power edge nodes to high-performance computing systems. iDMA is part of the PULP (Parallel Ultra-Low-Power) platform, where it is used as a cluster level DMA in the Snitch Cluster and in the PULP Cluster.
iDMA currently implements AXI4+ATOPs from AXI5.
iDMA is centered around the idea to split the DMA engine in 3 distinct parts:
- Frontend: The frontend implements the communication with the platform and emits transfer requests
- Midend: Midend(s) transform a transfer request from the frontend to generic 1D transfers, which can be handled by the backend.
- Bakend: The backend gets a 1D transfer
(src_addr, dst_addr, length)and executes it on the AXI4 manager interface.
The interface between the parts are well-defined, making it easy to adapt to a new system or to add new capabilities.
The latest documentation can be accessed pre-built. The Morty docs provide the generated description of the SystemVerilog files within this repository.
iDMA is released under Solderpad v0.51 (SHL-0.51) see LICENSE:
We are happy to accept pull requests and issues from any contributors. See CONTRIBUTING.md
for additional information.
iDMA can directly be integrated after cloning it from this repository. However, to regenerate the configuration registers, build the documentation, and run various checks on the source code, various tools are required.
bender >= v0.24.0morty >= v0.6.0Verilator = v4.202Verible >= v0.0-1051-gd4cd328Python3 >= 3.8including some the libraries listed inrequirements.txt
Use make doc to build the documentation. The output is located at doc/build.
We currently do not include any free and open-source simulation setup. However, if you have access to Questa advanced simulator, a simulation can be launched using:
make prepare_sim
vsim -c -do "source scripts/compile_vsim.tcl; quit"
vsim -c -t 1ps -voptargs=+acc \
+job_file=jobs/backend/man_simple.txt \
-logfile logs/backend.simple.vsim.log
-wlf logs/backend.simple.wlf \
tb_idma_backend \
-do "source scripts/start_vsim.tcl; run -all"
Where:
+job_file=jobs/backend/man_simple.txtcan point to any valid job file-logfile logs/backend.simple.vsim.logdenotes the log file-wlf logs/backend.simple.wlfspecifies a wave filetb_idma_backendcan be any of the supplied testbenches (test/tb_idma_*)