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pulp_cluster

pulp_cluster schematic

The pulp_cluster repository contains the structure of the cluster subsystem used in PULP chips. For more details on the internal architecture, see the README.md in the pulp repository.

The doc folder contains the draw.io schematic shown above, as well as the raw source to allow for updates, outlining the most important components in pulp_cluster, as well as the communication interfaces connecting these. While not a complete overview of all signals, this is meant as a slightly more detailed overview that can assist in development. Please be aware that the schematic may not be 100% accurate.

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The multi-core cluster of a PULP system.

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  • SystemVerilog 100.0%