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Support turbo mode for better latency but burn more power on CPU & NPU #250

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merged 4 commits into from
Sep 11, 2024
Merged

Support turbo mode for better latency but burn more power on CPU & NPU #250

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8584860
support two types of mailbox, mgmt and user
mamin506 Sep 6, 2024
5d720a1
suppot pmode turbo
mamin506 Sep 10, 2024
6c48f45
support hwq poll_command; add polling shim_test
mamin506 Sep 11, 2024
3766d21
support default, performance and turbo pmodes
mamin506 Sep 11, 2024
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7 changes: 6 additions & 1 deletion src/driver/amdxdna/aie2_message.c
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Original file line number Diff line number Diff line change
Expand Up @@ -249,6 +249,7 @@ int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwct
{
DECLARE_AIE2_MSG(create_ctx, MSG_OP_CREATE_CONTEXT);
struct amdxdna_dev *xdna = ndev->xdna;
enum xdna_mailbox_channel_type type;
struct xdna_mailbox_chann_res x2i;
struct xdna_mailbox_chann_res i2x;
struct cq_pair *cq_pair;
Expand Down Expand Up @@ -287,8 +288,12 @@ int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwct
}

intr_reg = i2x.mb_head_ptr_reg + 4;
if (aie2_pm_is_turbo(ndev))
type = MB_CHANNEL_USER_POLL;
else
type = MB_CHANNEL_USER_NORMAL;
hwctx->priv->mbox_chann = xdna_mailbox_create_channel(ndev->mbox, &x2i, &i2x,
intr_reg, ret);
intr_reg, ret, type);
if (!hwctx->priv->mbox_chann) {
XDNA_ERR(xdna, "not able to create channel");
ret = -EINVAL;
Expand Down
1 change: 0 additions & 1 deletion src/driver/amdxdna/aie2_msg_priv.h
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Expand Up @@ -186,7 +186,6 @@ struct exec_dpu_req {
u32 inst_prop_cnt;
u32 cu_idx;
u32 payload[35];

} __packed;

struct exec_dpu_preempt_req {
Expand Down
5 changes: 2 additions & 3 deletions src/driver/amdxdna/aie2_pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -428,7 +428,7 @@ static int aie2_hw_start(struct amdxdna_dev *xdna)
&ndev->mgmt_x2i,
&ndev->mgmt_i2x,
xdna_mailbox_intr_reg,
mgmt_mb_irq);
mgmt_mb_irq, MB_CHANNEL_MGMT);
if (!ndev->mgmt_chann) {
XDNA_ERR(xdna, "failed to create management mailbox channel");
ret = -EINVAL;
Expand Down Expand Up @@ -986,9 +986,8 @@ static int aie2_set_power_mode(struct amdxdna_client *client, struct amdxdna_drm
return -EFAULT;
}

/* Interpret the given buf->power_mode into the correct power mode*/
power_mode = power_state.power_mode;
if (power_mode > POWER_MODE_HIGH) {
if (power_mode > POWER_MODE_TURBO) {
XDNA_ERR(xdna, "Invalid power mode %d", power_mode);
return -EINVAL;
}
Expand Down
1 change: 1 addition & 0 deletions src/driver/amdxdna/aie2_pci.h
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Expand Up @@ -368,6 +368,7 @@ void aie2_stop_ctx_by_col_map(struct amdxdna_client *client, u32 col_map);
/* aie2_pm.c */
int aie2_pm_start(struct amdxdna_dev_hdl *ndev);
void aie2_pm_stop(struct amdxdna_dev_hdl *ndev);
bool aie2_pm_is_turbo(struct amdxdna_dev_hdl *ndev);
int aie2_pm_set_mode(struct amdxdna_dev_hdl *ndev, enum amdxdna_power_mode_type target);

#endif /* _AIE2_PCI_H_ */
47 changes: 35 additions & 12 deletions src/driver/amdxdna/aie2_pm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,32 @@ static int aie2_pm_clock_gating(struct amdxdna_dev_hdl *ndev, bool enable)
return ret;
}

bool aie2_pm_is_turbo(struct amdxdna_dev_hdl *ndev)
{
return ndev->pw_mode == POWER_MODE_TURBO;
}

static int aie2_pm_turbo(struct amdxdna_dev_hdl *ndev, bool enable)
{
struct amdxdna_dev *xdna = ndev->xdna;
struct amdxdna_client *client;
bool clk_gate_on;

drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));
list_for_each_entry(client, &xdna->client_list, node) {
bool empty;

mutex_lock(&client->hwctx_lock);
empty = idr_is_empty(&client->hwctx_idr);
mutex_unlock(&client->hwctx_lock);
if (!empty)
return -EBUSY;
}

clk_gate_on = !enable;
return aie2_pm_clock_gating(ndev, clk_gate_on);
}

int aie2_pm_set_mode(struct amdxdna_dev_hdl *ndev, enum amdxdna_power_mode_type target)
{
struct amdxdna_dev *xdna = ndev->xdna;
Expand All @@ -41,7 +67,7 @@ int aie2_pm_set_mode(struct amdxdna_dev_hdl *ndev, enum amdxdna_power_mode_type
if (ndev->pw_mode == target)
return 0;

if (target == POWER_MODE_LOW || target == POWER_MODE_MEDIUM)
if (target != POWER_MODE_DEFAULT && target != POWER_MODE_TURBO)
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We need to support performance/default/turbo.

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fixed

return -EOPNOTSUPP;

XDNA_DBG(xdna, "Changing power mode from %d to %d", ndev->pw_mode, target);
Expand All @@ -50,17 +76,14 @@ int aie2_pm_set_mode(struct amdxdna_dev_hdl *ndev, enum amdxdna_power_mode_type
/* Set power level within the device */

/*
* Other mode -> POWER_MODE_HIGH: Turn off clock gating
* POWER_MODE_HIGH -> Other mode: Turn on clock gating
* Other mode -> POWER_MODE_TURBO: Turn off turbo mode
* POWER_MODE_TURBO -> Other mode: Turn on turbo mode
* Otherwise, no change
*/
if (target == POWER_MODE_HIGH) {
XDNA_DBG(xdna, "Clock gating turning off");
ret = aie2_pm_clock_gating(ndev, false);
} else if (ndev->pw_mode == POWER_MODE_HIGH) {
XDNA_DBG(xdna, "Clock gating turning on");
ret = aie2_pm_clock_gating(ndev, true);
}
if (target == POWER_MODE_TURBO)
ret = aie2_pm_turbo(ndev, true);
else if (ndev->pw_mode == POWER_MODE_TURBO)
ret = aie2_pm_turbo(ndev, false);
if (ret) {
XDNA_ERR(xdna, "Failed to config clock gating");
return ret;
Expand All @@ -77,15 +100,15 @@ int aie2_pm_start(struct amdxdna_dev_hdl *ndev)
* TODO: should only skip POWER_MODE_DEFAULT.
* Let's make it right after full DPM support is ready
*/
if (ndev->pw_mode != POWER_MODE_HIGH)
if (ndev->pw_mode != POWER_MODE_TURBO)
return 0;

return aie2_pm_clock_gating(ndev, false);
}

void aie2_pm_stop(struct amdxdna_dev_hdl *ndev)
{
if (ndev->pw_mode != POWER_MODE_HIGH)
if (ndev->pw_mode != POWER_MODE_TURBO)
return;

/* Clock gating must be turned ON before suspend firmware */
Expand Down
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