boards/risc-v/k210: Fix arch flag since NuttX don't support FPU

[no1wudi]

Summary

NuttX don't support FPU for risc-v now, let's fix the arch flag to avoid compiler generate hardware float instruction, it would cause fault (e.g. libdsp & dsptest)

Impact

None

Testing

Tested on maix-bit:nsh \ maix-bit:smp with float operation

[no1wudi]

CI failure: actions/upload-artifact#116

[btashton]

@no1wudi :( Looks like GitHub actually made a fix recently in the base library so hopefully this will go away, but in the mean time I opened this #2592 to at least make it not fail the build.

I will also restart the run here.

[xiaoxiang781216]

Should we support fpu instead?

[no1wudi]

Should we support fpu instead?

I think FPU support is another topic, because current rv32/rv64 arch support have many duplicated code, maybe we should cleanup the code base to let them share common code like zephyr first?

[xiaoxiang781216]

Yes, 32bit and 64bit share the same specification and the designer intentionally support both arch by one code base. The design philosophy is totally different from arm and arm64, so rv32im and rv64gc should merge into one to reduce the maintain cost.

[xiaoxiang781216]

Create an issue(#2593) to track the problem.

[xiaoxiang781216]

We already have the code to save and restore fpu registers for rv32im:
https://github.com/apache/incubator-nuttx/blob/master/arch/risc-v/src/rv32im/riscv_fpu.S
Since the register definition is same(except the register width), it should be easy to enhance 32bit version to support 64bit(part of #2822).