[hotfix] Used a fixed Level Zero version for Intel integrated graphics #575
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jjfumero
approved these changes
Oct 7, 2024
mairooni
approved these changes
Oct 7, 2024
jjfumero
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Dec 20, 2024
Improvements ============= - beehive-lab#573: Enhanced output of unit-tests with a summary of pass-rates and fail-rates. - beehive-lab#576: Extended support for 3D matrices. - beehive-lab#580: Extended debug information for execution plans. - beehive-lab#584: Added helper menu for the ``tornado`` launcher script when no arguments are passed. - beehive-lab#589: Enable partial loop unrolling for all backends. - beehive-lab#594: Added RISC-V 64 CPU port support to run OpenCL with vector instructions RVV 1.0 (using the Codeplay OCK Toolkit). - beehive-lab#598: OpenCL low-level buffers tagged as read, write and read/write based on the data dependency analysis. - beehive-lab#601: Feature to select an immutable task graph to execute from a multi-task graph execution plan. Compatibility ============= - beehive-lab#570: Extended timeout for all suite of unit-tests. - beehive-lab#579: Removed legacy JDK 8 and JDK11 build options from the TornadoVM installer. - beehive-lab#582: Restored tornado runner scripts for IntellIJ. - beehive-lab#583: Automatic generation of IDE IntelliJ configuration runner files from the TornadoVM command. - beehive-lab#597: Updated white-list of unit-test and checkstyle improved. Bug Fixes ============= - beehive-lab#571: Fix issues with bracket closing for if/loops conditions. - beehive-lab#572: Fix for printing default execution plans (execution plans with default parameters). - beehive-lab#575: Fix the Level Zero version used for building the SPIR-V backend. - beehive-lab#577: Fix checkstyle. - beehive-lab#587: Fix thread scheduler for new NVIDIA Drivers. - beehive-lab#592: Fix ``Float.POSITIVE_INFINITY`` and ``Float.NEGATIVE_INFINITIVE`` constants for the OpenCL, CUDA and SPIR-V backends. - beehive-lab#596: Fix extra closing bracket during the code-generation for the FPGAs. - Remove the intermediate CUDA pinned memory regions in the JNI code: [link](beehive-lab@9c3f8ce) - Fix bitwise negation operations for the PTX backend: [link](beehive-lab@0db1cd3) - `GetBackendImpl::getAllDevices` thread-safe: [link](beehive-lab@0d44252) - Check size elements for memory segments: [link](beehive-lab@4360385)
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Description
This PR forces the TornadoVM installation script to use a specific Level Zero version (v1.17.45) because the recent merge of the changes for the L0 specification 1.11 do not allow Intel integrated graphics to be recognized as Level Zero devices.
A relevant issue is opened in the level-zero repository: oneapi-src/level-zero#209
Backend/s tested
Mark the backends affected by this PR.
OS tested
Mark the OS where this PR is tested.
Did you check on FPGAs?
If it is applicable, check your changes on FPGAs.
How to test the new patch?
To test this PR, you should have an Intel integrated graphics in your system, and to remove first any existing level-zero directories.
rm -rf level* make BACKEND=spirv tornado --devices