Welcome to the Virtual CPU Emulator project! This project aims to build an emulation of a virtual CPU from the ground up, over the span of 10 weeks. Each week we will focus on different tasks to incrementally build and refine our emulator. Made By Bangladeshi Students. π§π©
- Member 1: MD. Rohan ID: 11220320958
- Member 2: Sanjana Athoy ID: 11220320953
- Member 3: Tumpa Talukder ID: 11220320962
- Course Name: Computer Architecture
- Course Code: 3101
- Section: 5D
- Department: Computer Science & Engineering
- Instructor: Vashkar Kar (Lecturer)
- Institute: Northern University of Business & Technology, Khulna
- Website: www.nubtkhulna.ac.bd
The project will simulate a basic CPU architecture, complete with an instruction set, memory management, and execution pipeline. The emulator will be designed to handle a set of predefined instructions and will be tested using a suite of assembly programs.
The primary objective is to gain a thorough understanding of CPU design and operation by implementing a virtual emulator. This includes:
- Designing an Instruction Set Architecture (ISA)
- Implementing an assembler to convert assembly code to machine code
- Simulating the execution of machine instructions within the virtual CPU
- Programming Language: C++
- Version Control: GitHub
- Assembler: Custom assembler for converting assembly code to machine code
- Development Environment: Any C++ IDE or text editor with C++
- Objective: Define project scope, gather resources, set up development environment.
- Tasks:
- Outline the features of the virtual CPU.
- Choose a programming language (Python/C++) and tools.
- Set up version control (e.g., GitHub).
- Objective: Design the ISA for the virtual CPU.
- Tasks:
- Define basic instructions (ADD, SUB, LOAD, STORE, etc.).
- Document the instruction formats.
- Create a simple assembler to convert assembly code into machine code.
- Objective: Implement core components of the CPU.
- Tasks:
- Build the ALU (Arithmetic Logic Unit).
- Implement general-purpose registers.
- Create the program counter and instruction register.
- Objective: Develop the instruction fetch-decode-execute cycle.
- Tasks:
- Implement the instruction fetching mechanism.
- Decode instructions and execute them using the ALU and registers.
- Test with simple programs.
- Objective: Implement memory management for the virtual CPU.
- Tasks:
- Set up a simulated memory space.
- Implement memory read/write operations.
- Handle address mapping and memory segmentation.
- Objective: Enable basic input/output operations.
- Tasks:
- Implement simulated I/O devices (keyboard, display).
- Create I/O instructions and integrate them with the CPU.
- Test with I/O-intensive programs.
- Objective: Add advanced CPU features.
- Tasks:
- Implement branching and control flow instructions.
- Add support for subroutines and interrupts.
- Integrate a simple pipeline mechanism.
- Objective: Optimize the emulator for better performance.
- Tasks:
- Profile the emulator to identify bottlenecks.
- Optimize critical code paths.
- Enhance the assembler for better instruction encoding.
- Objective: Thoroughly test and debug the emulator.
- Tasks:
- Test with a variety of assembly programs.
- Debug and fix any issues.
- Validate performance against benchmarks.
- Objective: Document the project and prepare for presentation.
- Tasks:
- Write comprehensive documentation.
- Prepare a project report and presentation slides.
- Conduct a demo session.
- Clone the repository:
git clone https://github.com/yourusername/virtual-cpu-emulator.git
Coming Soon.
Open License. Feel Free to use & Modify
<<<<<<< HEAD Primary Contact: π¬ MD. Rohan, Mail: mdrohansheikh1000@gmail.com
Primary Contact: π¬ MD. Rohan, Mail: mdrohansheikh1000@gmail.com
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