Legalize fmin/fmax with NaN quieting semantics #1821
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This instruction converts i32x4 to f32x4 in several AVX512 feature sets.
This instruction is necessary for lowering `fcvt_from_uint`.
This converts an `i32x4` into an `f32x4` with some rounding either by using an AVX512VL/F instruction--VCVTUDQ2PS--or a long sequence of SSE4.1 compatible instructions.
The NaN semantics of the Wasm SIMD spec do not closely align to x86's NaN semantics, resulting in generated code with extra instructions, e.g. to quiet NaNs. This flag allows users to assert that floating-point operations will not produce NaNs (for SIMD primarily, but this could be used eventually in a scalar context) so that Cranelift can emit fewer instructions--hopefully faster code.
This reuses the `x86_cvtt2si` instruction since the packed and scalar versions seem to group together well.
With user assertions, use CVTTPS2DQ directly; otherwise, use a lengthy sequence to quiet NaNs and saturate overflow.
Because the Wasm specification semantics for NaN handling in `min` and `max` are not x86-friendly, this legalization allows the user to generate code that is spec-compliant (a long sequence of instructions) or fast (a single instruction), using the `assert_no_nans` flag.
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This builds on #1820 and should be merged after that PR.
The Wasm SIMD spec defines semantics for
fminandfmaxthat require runtimes to produce long sequences of instructions. This change adds these long sequences through legalization but also provides an alternate mechansim, using theassert_no_nansflag, for guaranteeing that special NaN handling is not required, thus resulting in a much shorter legalization.