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It is my understanding that firrtl doesn't care what input and output ports of a module are named. The current chisel3 frontend has a private variable called ports that is only clk, reset, and io.
I propose that we make this variable protected instead of private.
This will allow people to have input/output ports outside of the IO bundle, making chisel3 match firrtl more closely.
The text was updated successfully, but these errors were encountered:
It is my understanding that firrtl doesn't care what input and output ports of a module are named. The current chisel3 frontend has a private variable called ports that is only clk, reset, and io.
I propose that we make this variable protected instead of private.
This will allow people to have input/output ports outside of the IO bundle, making chisel3 match firrtl more closely.
The text was updated successfully, but these errors were encountered: