Private vals

chiselFrontend/src/main/scala/chisel3/core/Module.scala

@@ -199,8 +199,13 @@ extends HasId {
           }
         case _ => // Do nothing
       }
+    /** Scala generates names like chisel3$util$Queue$$ram for private vals
+      * This extracts the part after $$ for names like this and leaves names
+      * without $$ unchanged
+      */
+    def cleanName(name: String): String = name.split("""\$\$""").lastOption.getOrElse(name)
     for (m <- getPublicFields(classOf[Module])) {
-      nameRecursively(m.getName, m.invoke(this))
+      nameRecursively(cleanName(m.getName), m.invoke(this))
     }
 
     // For Module instances we haven't named, suggest the name of the Module

src/main/scala/chisel3/util/Arbiter.scala

@@ -32,8 +32,8 @@ private object ArbiterCtrl {
 }
 
 abstract class LockingArbiterLike[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T => Bool]) extends Module {
-  def grant: Seq[Bool]
-  def choice: UInt
+  protected def grant: Seq[Bool]
+  protected def choice: UInt
   val io = IO(new ArbiterIO(gen, n))
 
   io.chosen := choice
@@ -62,16 +62,16 @@ abstract class LockingArbiterLike[T <: Data](gen: T, n: Int, count: Int, needsLo
 
 class LockingRRArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T => Bool] = None)
     extends LockingArbiterLike[T](gen, n, count, needsLock) {
-  lazy val lastGrant = RegEnable(io.chosen, io.out.fire())
-  lazy val grantMask = (0 until n).map(_.asUInt > lastGrant)
-  lazy val validMask = io.in zip grantMask map { case (in, g) => in.valid && g }
+  private lazy val lastGrant = RegEnable(io.chosen, io.out.fire())
+  private lazy val grantMask = (0 until n).map(_.asUInt > lastGrant)
+  private lazy val validMask = io.in zip grantMask map { case (in, g) => in.valid && g }
 
-  override def grant: Seq[Bool] = {
+  override protected def grant: Seq[Bool] = {
     val ctrl = ArbiterCtrl((0 until n).map(i => validMask(i)) ++ io.in.map(_.valid))
     (0 until n).map(i => ctrl(i) && grantMask(i) || ctrl(i + n))
   }
 
-  override lazy val choice = Wire(init=(n-1).asUInt)
+  override protected lazy val choice = Wire(init=(n-1).asUInt)
   for (i <- n-2 to 0 by -1)
     when (io.in(i).valid) { choice := i.asUInt }
   for (i <- n-1 to 1 by -1)
@@ -80,9 +80,9 @@ class LockingRRArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[
 
 class LockingArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T => Bool] = None)
     extends LockingArbiterLike[T](gen, n, count, needsLock) {
-  def grant: Seq[Bool] = ArbiterCtrl(io.in.map(_.valid))
+  protected def grant: Seq[Bool] = ArbiterCtrl(io.in.map(_.valid))
 
-  override lazy val choice = Wire(init=(n-1).asUInt)
+  override protected lazy val choice = Wire(init=(n-1).asUInt)
   for (i <- n-2 to 0 by -1)
     when (io.in(i).valid) { choice := i.asUInt }
 }
@@ -121,7 +121,7 @@ class Arbiter[T <: Data](gen: T, n: Int) extends Module {
     }
   }
 
-  val grant = ArbiterCtrl(io.in.map(_.valid))
+  private val grant = ArbiterCtrl(io.in.map(_.valid))
   for ((in, g) <- io.in zip grant)
     in.ready := g && io.out.ready
   io.out.valid := !grant.last || io.in.last.valid

src/main/scala/chisel3/util/Decoupled.scala

@@ -175,16 +175,16 @@ extends Module(override_reset=override_reset) {
 
   val io = IO(new QueueIO(gen, entries))
 
-  val ram = Mem(entries, gen)
-  val enq_ptr = Counter(entries)
-  val deq_ptr = Counter(entries)
-  val maybe_full = Reg(init=false.B)
+  private val ram = Mem(entries, gen)
+  private val enq_ptr = Counter(entries)
+  private val deq_ptr = Counter(entries)
+  private val maybe_full = Reg(init=false.B)
 
-  val ptr_match = enq_ptr.value === deq_ptr.value
-  val empty = ptr_match && !maybe_full
-  val full = ptr_match && maybe_full
-  val do_enq = Wire(init=io.enq.fire())
-  val do_deq = Wire(init=io.deq.fire())
+  private val ptr_match = enq_ptr.value === deq_ptr.value
+  private val empty = ptr_match && !maybe_full
+  private val full = ptr_match && maybe_full
+  private val do_enq = Wire(init=io.enq.fire())
+  private val do_deq = Wire(init=io.deq.fire())
 
   when (do_enq) {
     ram(enq_ptr.value) := io.enq.bits
@@ -214,7 +214,7 @@ extends Module(override_reset=override_reset) {
     when (io.deq.ready) { io.enq.ready := true.B }
   }
 
-  val ptr_diff = enq_ptr.value - deq_ptr.value
+  private val ptr_diff = enq_ptr.value - deq_ptr.value
   if (isPow2(entries)) {
     io.count := Cat(maybe_full && ptr_match, ptr_diff)
   } else {