[Arm64] Support table-driven code generation for scalar intrinsics #447
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Motivation 1: To support table-driven approach during code generation of "simple" scalar intrinsics (the ones that don't require non-trivial instruction lookup or moving the values between operand registers and destination register).
Motivation 2: To support special (non table-driven) codegen of intrinsics with 3 operands (e.g.
BitwiseSelect
).When I implemented these logics for scalar intrinsics and 3 operands intrinsics I found that functions
CodeGen::genHWIntrinsic
andCodeGen::genSpecialIntrinsic
have at least 50% of the identical code so I moved the shared preparatory logic (that looks up intrinsic ID and category, the corresponding operand nodes, and base type) to a separate classHWIntrinsic
.This way I could remove special codegen for
NI_ArmBase_LeadingZeroCount
NI_ArmBase_Arm64_LeadingSignCount
NI_ArmBase_Arm64_LeadingZeroCount
.