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liteeth/mac/wishbone: Fix write_only mode on RX.
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enjoy-digital committed Jun 25, 2024
1 parent ec05e9c commit 80bded4
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion liteeth/mac/wishbone.py
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ def __init__(self, dw, nrxslots=2, ntxslots=2, endianness="big", timestamp=None,
mems = self.sram.writer.mems,
nslots = nrxslots,
read_only = rxslots_read_only,
write_only = True,
write_only = False,
)
self._expose_wishbone_sram_interfaces(
bus = self.bus_tx,
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