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Only import liteiclink when required ci #402: Pull request #164 opened by m-byte
July 14, 2024 20:39 Action required VOGL-electronic:optional_liteiclink
VOGL-electronic:optional_liteiclink
July 14, 2024 20:39 Action required
Update a7_gtp.py transceiver resets have to stay low for 10us. ci #401: Pull request #163 opened by cyntem
July 14, 2024 17:08 9m 55s cyntem:patch-1
cyntem:patch-1
July 14, 2024 17:08 9m 55s
phy/1000basex: Use pll.config["d"] to compute TX_PROGDIV_CFG/RX_PROGD… ci #400: Commit 583137e pushed by enjoy-digital
July 10, 2024 14:57 9m 57s master
master
July 10, 2024 14:57 9m 57s
bench: Set margin to 0 on 1000/2500BaseX reference clock generation. ci #399: Commit e0f053e pushed by enjoy-digital
July 10, 2024 13:39 9m 48s master
master
July 10, 2024 13:39 9m 48s
phy/xgmii: Switch to LiteXModule and some cleanups. ci #398: Commit 08c1077 pushed by enjoy-digital
July 10, 2024 10:00 12m 3s master
master
July 10, 2024 10:00 12m 3s
mac/wishbone: Fix ntxslots/nrxslots == 1 case. ci #397: Commit ec7320f pushed by enjoy-digital
July 2, 2024 11:50 9m 45s master
master
July 2, 2024 11:50 9m 45s
liteeth/mac/sram: Switch to LiteXModule. ci #396: Commit a00640b pushed by enjoy-digital
June 26, 2024 13:44 9m 40s master
master
June 26, 2024 13:44 9m 40s
Merge pull request #161 from enjoy-digital/wishbone_tx_rx_buses ci #395: Commit e4f5385 pushed by enjoy-digital
June 26, 2024 13:41 9m 42s master
master
June 26, 2024 13:41 9m 42s
liteeth/mac/sram: Switch to LiteXModule. ci #394: Commit 07252e6 pushed by enjoy-digital
June 26, 2024 13:38 6h 0m 23s master
master
June 26, 2024 13:38 6h 0m 23s
Merge pull request #161 from enjoy-digital/wishbone_tx_rx_buses ci #393: Commit e4f5385 pushed by enjoy-digital
June 25, 2024 17:04 9m 45s master
master
June 25, 2024 17:04 9m 45s
mac/wishbone/LiteEthMACWishboneInterface: Expose separate TX/RX Wishb… ci #392: Pull request #161 synchronize by enjoy-digital
June 25, 2024 16:53 9m 55s wishbone_tx_rx_buses
wishbone_tx_rx_buses
June 25, 2024 16:53 9m 55s
liteeth/gen: Update MACCore with EthMAC changes. ci #391: Commit a118dd1 pushed by enjoy-digital
June 25, 2024 16:53 10m 16s wishbone_tx_rx_buses
wishbone_tx_rx_buses
June 25, 2024 16:53 10m 16s
mac/wishbone/LiteEthMACWishboneInterface: Expose separate TX/RX Wishb… ci #390: Pull request #161 synchronize by enjoy-digital
June 25, 2024 16:37 10m 0s wishbone_tx_rx_buses
wishbone_tx_rx_buses
June 25, 2024 16:37 10m 0s
liteeth/mac/wishbone: Fix write_only mode on RX. ci #389: Commit 80bded4 pushed by enjoy-digital
June 25, 2024 16:37 9m 53s wishbone_tx_rx_buses
wishbone_tx_rx_buses
June 25, 2024 16:37 9m 53s
mac/wishbone/LiteEthMACWishboneInterface: Expose separate TX/RX Wishb… ci #388: Pull request #161 opened by enjoy-digital
June 25, 2024 15:38 7m 50s wishbone_tx_rx_buses
wishbone_tx_rx_buses
June 25, 2024 15:38 7m 50s
mac/wishbone/LiteEthMACWishboneInterface: Expose separate TX/RX Wishb… ci #387: Commit 151b421 pushed by enjoy-digital
June 25, 2024 15:37 7m 35s wishbone_tx_rx_buses
wishbone_tx_rx_buses
June 25, 2024 15:37 7m 35s
version: Bump to 2024.04. ci #386: Commit 7d24ac3 pushed by enjoy-digital
June 5, 2024 20:12 9m 40s 2024.04
2024.04
June 5, 2024 20:12 9m 40s
version: Bump to 2024.04. ci #385: Commit 7d24ac3 pushed by enjoy-digital
June 5, 2024 20:07 10m 25s master
master
June 5, 2024 20:07 10m 25s
Merge pull request #160 from whiteb3ar/master ci #384: Commit e209a1c pushed by enjoy-digital
April 14, 2024 06:26 9m 46s master
master
April 14, 2024 06:26 9m 46s
frontend/stream/LiteEthStream2UDPTX: Condition source.last_be to sour… ci #382: Commit a0d59dd pushed by enjoy-digital
April 11, 2024 08:47 10m 9s master
master
April 11, 2024 08:47 10m 9s
mac/crc: Revert 30e66a7 (introducing a regression). ci #381: Commit 79ccffc pushed by enjoy-digital
April 8, 2024 15:52 9m 56s master
master
April 8, 2024 15:52 9m 56s
mac/crc: Revert 30e66a7 (introducing a regression). ci #380: Commit 9a5d8ca pushed by enjoy-digital
April 8, 2024 15:15 10m 12s master
master
April 8, 2024 15:15 10m 12s
mac/crc: Cosmetic cleanup. ci #379: Commit 421e008 pushed by enjoy-digital
April 5, 2024 07:20 6h 0m 26s master
master
April 5, 2024 07:20 6h 0m 26s
core/ip/LiteEthIPTX: Enable buffer to ease timings on checksum. ci #378: Commit fb407ce pushed by enjoy-digital
April 4, 2024 15:58 6h 0m 26s master
master
April 4, 2024 15:58 6h 0m 26s
core/ip: Add optional input buffer on LiteEthIPTX to improve timings. ci #377: Commit 211cdc2 pushed by enjoy-digital
April 4, 2024 15:27 6h 0m 23s master
master
April 4, 2024 15:27 6h 0m 23s