Check all features and targets in CI when linting (#1824)

* Check more features and targets in CI when linting

* Address clippy lints

* Address clippy lints for esp-wifi

* Expand println and storage checks

* Remove uneeded clippy lint

* Check every package for each target

* resolve esp-wifi clippy lints

* use defmt when building esp-wifi

* clean up

* fix warning in meta crate

* simplify CI workflow

* split up clippy jobs

.github/workflows/ci.yml

@@ -64,33 +64,32 @@ jobs:
     steps:
       - uses: actions/checkout@v4
 
+      # Install the Rust toolchain for Xtensa devices:
+      - uses: esp-rs/xtensa-toolchain@v1.5
+        with:
+          default: true
+          ldproxy: false
       # Install the Rust stable and nightly toolchains for RISC-V devices:
-      - if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
-        uses: dtolnay/rust-toolchain@v1
+      - uses: dtolnay/rust-toolchain@v1
         with:
           target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
           toolchain: stable
           components: rust-src
-      - if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
-        uses: dtolnay/rust-toolchain@v1
+      - uses: dtolnay/rust-toolchain@v1
         with:
           target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
           toolchain: nightly
           components: rust-src
-      # Install the Rust toolchain for Xtensa devices:
-      - if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc)
-        uses: esp-rs/xtensa-toolchain@v1.5
-        with:
-          buildtargets: ${{ matrix.device.soc }}
-          default: true
-          ldproxy: false
 
       - uses: Swatinem/rust-cache@v2
 
       # Build all supported examples for the low-power core first (if present):
       - if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.device.soc)
-        name: Build prerequisites (esp-lp-hal)
+        name: Build prerequisite examples (esp-lp-hal)
         run: cargo xtask build-examples esp-lp-hal ${{ matrix.device.soc }}
+      - if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.device.soc)
+        name: Check esp-lp-hal documentation
+        run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-lp-hal --chips ${{ matrix.device.soc }}
 
       # Make sure we're able to build the HAL without the default features
       # enabled:
@@ -106,134 +105,15 @@ jobs:
         run: cargo xtask build-examples esp-hal ${{ matrix.device.soc }}
       # Check doc-tests
       - name: Check doc-tests
-        run: cargo xtask run-doc-test esp-hal ${{ matrix.device.soc }}
+        run: cargo +esp xtask run-doc-test esp-hal ${{ matrix.device.soc }}
       - name: Check documentation
-        run:  RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-hal --chips ${{ matrix.device.soc }}
+        run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-hal --chips ${{ matrix.device.soc }}
+      # Run clippy
+      - name: Clippy
+        # We use the 'esp' toolchain for *all* targets, in order to get a
+        # semi-stable and consistent set of lints for all targets:
+        run: cargo +esp xtask lint-packages --chips ${{ matrix.device.soc }}
 
-  esp-lp-hal:
-    runs-on: ubuntu-latest
-
-    strategy:
-      fail-fast: false
-      matrix:
-        soc: ["esp32c6", "esp32s2", "esp32s3"]
-
-    steps:
-      - uses: actions/checkout@v4
-
-      # Install the Rust stable and nightly toolchains for RISC-V devices:
-      - uses: dtolnay/rust-toolchain@v1
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: stable
-          components: rust-src
-      - uses: dtolnay/rust-toolchain@v1
-        if: ${{ !contains(fromJson('["esp32s2", "esp32s3"]'), matrix.soc) }}
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: nightly
-          components: rust-src
-      # Install the Rust toolchain for Xtensa devices:
-      - if: contains(fromJson('["esp32s2", "esp32s3"]'), matrix.soc)
-        uses: esp-rs/xtensa-toolchain@v1.5
-        with:
-          buildtargets: ${{ matrix.soc }}
-          default: true
-          ldproxy: false
-
-
-      - uses: Swatinem/rust-cache@v2
-
-      # Build all supported examples for the specified device:
-      - name: Build examples
-        run: cargo xtask build-examples esp-lp-hal ${{ matrix.soc }}
-      - name: Check documentation
-        run:  RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-lp-hal --chips ${{ matrix.soc }}
-  esp-riscv-rt:
-    runs-on: ubuntu-latest
-
-    steps:
-      - uses: actions/checkout@v4
-      - uses: dtolnay/rust-toolchain@v1
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: stable
-          components: rust-src
-      - uses: Swatinem/rust-cache@v2
-
-      # Build for all RISC-V targets (no features):
-      - name: Build esp-riscv-rt (riscv32imc, no features)
-        run: cd esp-riscv-rt/ && cargo build --target=riscv32imc-unknown-none-elf
-      - name: Build esp-riscv-rt (riscv32imac, no features)
-        run: cd esp-riscv-rt/ && cargo build --target=riscv32imac-unknown-none-elf
-      # Build for all RISC-V targets (all features):
-      - name: Build esp-riscv-rt (riscv32imc, all features)
-        run: cd esp-riscv-rt/ && cargo build --target=riscv32imc-unknown-none-elf --features=ci
-      - name: Build esp-riscv-rt (riscv32imac, all features)
-        run: cd esp-riscv-rt/ && cargo build --target=riscv32imac-unknown-none-elf --features=ci
-
-  esp-println:
-    name: esp-println (${{ matrix.device.soc }})
-    runs-on: ubuntu-latest
-
-    strategy:
-      fail-fast: false
-      matrix:
-        device: [
-            # RISC-V devices:
-            { soc: "esp32c2", target: "riscv32imc-unknown-none-elf" },
-            { soc: "esp32c3", target: "riscv32imc-unknown-none-elf" },
-            { soc: "esp32c6", target: "riscv32imac-unknown-none-elf" },
-            { soc: "esp32h2", target: "riscv32imac-unknown-none-elf" },
-            # Xtensa devices:
-            { soc: "esp32", target: "xtensa-esp32-none-elf" },
-            { soc: "esp32s2", target: "xtensa-esp32s2-none-elf" },
-            { soc: "esp32s3", target: "xtensa-esp32s3-none-elf" },
-          ]
-
-    steps:
-      - uses: actions/checkout@v4
-
-      # Install the Rust stable and nightly toolchains for RISC-V devices:
-      - if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
-        uses: dtolnay/rust-toolchain@v1
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: stable
-          components: rust-src
-      - if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
-        uses: dtolnay/rust-toolchain@v1
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: nightly
-          components: rust-src
-      # Install the Rust toolchain for Xtensa devices:
-      - if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc)
-        uses: esp-rs/xtensa-toolchain@v1.5
-        with:
-          buildtargets: ${{ matrix.device.soc }}
-          default: true
-          ldproxy: false
-
-      - uses: Swatinem/rust-cache@v2
-
-      # Make sure we're able to build with the default features and most common features enabled
-      - name: Build (no features)
-        run: |
-          cargo xtask build-package \
-            --features=${{ matrix.device.soc }},log \
-            --target=${{ matrix.device.target }} \
-            esp-println
-
-      # So #1678 doesn't reoccur ('defmt-espflash,auto')
-      - name: Build (with feature 'defmt-espflash')
-        run: |
-          cargo xtask build-package \
-            --features=${{ matrix.device.soc }},log,defmt-espflash \
-            --target=${{ matrix.device.target }} \
-            esp-println
-      - name: Check documentation
-        run:  RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-println --chips ${{ matrix.device.soc }}
   extras:
     runs-on: ubuntu-latest
 
@@ -257,13 +137,19 @@ jobs:
   # --------------------------------------------------------------------------
   # MSRV
 
-  msrv-riscv:
+  msrv:
     runs-on: ubuntu-latest
     env:
       RUSTC_BOOTSTRAP: 1
 
     steps:
       - uses: actions/checkout@v4
+      # install esp toolchain first so it isn't set as the default
+      - uses: esp-rs/xtensa-toolchain@v1.5
+        with:
+          default: true
+          ldproxy: false
+          version: ${{ env.MSRV }}
       - uses: dtolnay/rust-toolchain@v1
         with:
           target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
@@ -272,56 +158,28 @@ jobs:
       - uses: Swatinem/rust-cache@v2
 
       # Verify the MSRV for all RISC-V chips.
-      - name: msrv (esp-hal)
+      - name: msrv RISCV (esp-hal)
         run: |
           cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf   esp-hal
           cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf   esp-hal
           cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf  esp-hal
           cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf  esp-hal
-      - name: msrv (esp-lp-hal)
-        run: |
-          cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
-          cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf  esp-lp-hal
-          cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf  esp-lp-hal
-
-  msrv-xtensa:
-    runs-on: ubuntu-latest
-    env:
-      RUSTC_BOOTSTRAP: 1
-
-    steps:
-      - uses: actions/checkout@v4
-      - uses: esp-rs/xtensa-toolchain@v1.5
-        with:
-          ldproxy: false
-          version: ${{ env.MSRV }}
-      - uses: Swatinem/rust-cache@v2
 
       # Verify the MSRV for all Xtensa chips:
-      - name: msrv (esp-hal)
+      - name: msrv Xtensa (esp-hal)
         run: |
           cargo xtask build-package --toolchain=esp --features=esp32,ci   --target=xtensa-esp32-none-elf   esp-hal
           cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal
           cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal
 
-  # --------------------------------------------------------------------------
-  # Lint & Format
-
-  clippy:
-    runs-on: ubuntu-latest
-
-    steps:
-      - uses: actions/checkout@v4
-      # We use the 'esp' toolchain for *all* targets, in order to get a
-      # semi-stable and consistent set of lints for all targets:
-      - uses: esp-rs/xtensa-toolchain@v1.5
-        with:
-          default: true
-          ldproxy: false
-      - uses: Swatinem/rust-cache@v2
+      - name: msrv (esp-lp-hal)
+        run: |
+          cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
+          cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf  esp-lp-hal
+          cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf  esp-lp-hal
 
-      # Lint all packages:
-      - run: cargo xtask lint-packages
+  # --------------------------------------------------------------------------
+  # Format
 
   rustfmt:
     runs-on: ubuntu-latest

esp-backtrace/src/riscv.rs

@@ -7,7 +7,7 @@ use crate::MAX_BACKTRACE_ADDRESSES;
 // we get better results (especially if the caller was the last function in the
 // calling function) if we report the address of the JALR itself
 // even if it was a C.JALR we should get good results using RA - 4
-#[allow(unused)]
+#[cfg(feature = "panic-handler")]
 pub(super) const RA_OFFSET: usize = 4;
 
 /// Registers saved in trap handler

esp-backtrace/src/xtensa.rs

@@ -6,6 +6,7 @@ use crate::MAX_BACKTRACE_ADDRESSES;
 // the return address is the address following the callxN
 // we get better results (especially if the caller was the last function in the
 // calling function) if we report the address of callxN itself
+#[cfg(feature = "panic-handler")]
 pub(super) const RA_OFFSET: usize = 3;
 
 #[doc(hidden)]

esp-hal/Cargo.toml

@@ -182,7 +182,7 @@ opsram-8m = []
 opsram-16m = []
 
 # This feature is intended for testing; you probably don't want to enable it:
-ci = ["async", "embedded-hal-02", "embedded-io", "ufmt"]
+ci = ["async", "embedded-hal-02", "embedded-io", "ufmt", "defmt", "bluetooth", "place-spi-driver-in-ram"]
 
 [lints.clippy]
 mixed_attributes_style = "allow"

esp-hal/src/dma/mod.rs

@@ -2174,13 +2174,11 @@ pub(crate) mod asynch {
             TX::waker().register(cx.waker());
             if self.tx.is_listening_eof() {
                 Poll::Pending
+            } else if self.tx.has_error() {
+                self.tx.clear_interrupts();
+                Poll::Ready(Err(DmaError::DescriptorError))
             } else {
-                if self.tx.has_error() {
-                    self.tx.clear_interrupts();
-                    Poll::Ready(Err(DmaError::DescriptorError))
-                } else {
-                    Poll::Ready(Ok(()))
-                }
+                Poll::Ready(Ok(()))
             }
         }
     }
@@ -2220,14 +2218,14 @@ pub(crate) mod asynch {
             RX::waker().register(cx.waker());
             if self.rx.is_listening_eof() {
                 Poll::Pending
+            } else if self.rx.has_error()
+                || self.rx.has_dscr_empty_error()
+                || self.rx.has_eof_error()
+            {
+                self.rx.clear_interrupts();
+                Poll::Ready(Err(DmaError::DescriptorError))
             } else {
-                if self.rx.has_error() || self.rx.has_dscr_empty_error() || self.rx.has_eof_error()
-                {
-                    self.rx.clear_interrupts();
-                    Poll::Ready(Err(DmaError::DescriptorError))
-                } else {
-                    Poll::Ready(Ok(()))
-                }
+                Poll::Ready(Ok(()))
             }
         }
     }
@@ -2264,13 +2262,11 @@ pub(crate) mod asynch {
             TX::waker().register(cx.waker());
             if self.tx.is_listening_ch_out_done() {
                 Poll::Pending
+            } else if self.tx.has_error() {
+                self.tx.clear_interrupts();
+                Poll::Ready(Err(DmaError::DescriptorError))
             } else {
-                if self.tx.has_error() {
-                    self.tx.clear_interrupts();
-                    Poll::Ready(Err(DmaError::DescriptorError))
-                } else {
-                    Poll::Ready(Ok(()))
-                }
+                Poll::Ready(Ok(()))
             }
         }
     }
@@ -2309,14 +2305,14 @@ pub(crate) mod asynch {
             RX::waker().register(cx.waker());
             if self.rx.is_listening_ch_in_done() {
                 Poll::Pending
+            } else if self.rx.has_error()
+                || self.rx.has_dscr_empty_error()
+                || self.rx.has_eof_error()
+            {
+                self.rx.clear_interrupts();
+                Poll::Ready(Err(DmaError::DescriptorError))
             } else {
-                if self.rx.has_error() || self.rx.has_dscr_empty_error() || self.rx.has_eof_error()
-                {
-                    self.rx.clear_interrupts();
-                    Poll::Ready(Err(DmaError::DescriptorError))
-                } else {
-                    Poll::Ready(Ok(()))
-                }
+                Poll::Ready(Ok(()))
             }
         }
     }

esp-hal/src/i2c.rs

@@ -619,7 +619,7 @@ mod asynch {
             const NUM_I2C: usize = 1;
         }
     }
-
+    #[allow(clippy::declare_interior_mutable_const)]
     const INIT: AtomicWaker = AtomicWaker::new();
     static WAKERS: [AtomicWaker; NUM_I2C] = [INIT; NUM_I2C];
 

esp-hal/src/i2s.rs

@@ -2268,7 +2268,7 @@ pub mod asynch {
         /// Will wait for more than 0 bytes available.
         pub async fn available(&mut self) -> Result<usize, Error> {
             loop {
-                self.state.update(&mut self.i2s_tx.tx_channel);
+                self.state.update(&self.i2s_tx.tx_channel);
                 let res = self.state.available;
 
                 if res != 0 {