esp-16.0.4-20231113

Changes (since esp-16.0.0-20230516):

Features:

• Rebased on LLVM 16.0.4
• [Xtensa] Implement CTLZ/CTTZ with NSAU. Closes #77.
• [Xtensa] Handle musttail. Closes #73.
• [Xtensa] Add MINMAX and CLAMPS feature. Closes #78.
• [Xtensa] Add support for ESP32 S3 DSP instructions. The instructions are supported via clang builtins only, which are basically 1-1 mapping to asm instructions.
• [Xtensa] Connect abs to llvm.abs. Closes #78.
• [Xtensa] Configurable FAST int types size. Implemented special option -mfast-int-min32 to workaround compatibility problem with Xtensa GCC's backend which defines size of FAST int types as 4 bytes.

Bug Fixes:

• [Xtensa] Add spill slot for smaller estimated stack size.
• [Xtensa] Fix wchar type. Previously wchar was internally represented as unsigned char. Now it is represented as signed int.
• [Xtensa] Add absent IR passes. Added common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
• [Xtensa] Fix Clang builtins include directory. Fixes #83. Closes #84.
• [LLD][Xtensa] Improve literal sections placement. Literal sections are now put as close as possible to appropriate text sections.
• Get back [Xtensa] Fixes HW loop pass f389074 which was lost during rebase on LLVM 16.0.0. See details about the fix in esp-15.0.0-20230404 release notes.
• [Xtensa] Fix FP mul-sub fusion. Closes #76.
• [Xtensa] Fix asm parsing of special interrupt registers names. Fixes #68. Closes #69
• [Xtensa] Fix i8/i16 alignment. Change preferable alignment for i8 and i16 types on stack to 32-bit.
• [LLD][Xtensa] Recognize bt instruction in lld.
• [Xtensa] Respect srli assembler semantics. Fixes #70.