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fby3.5: hd: Add ISR (#488)
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Summary:
- Remove HSC OCP setting and use default setting(600W).
  Because 320W CPU is used currently, if we set HSC OCP to 350W it will trigger HSC CSOUT during power on.
- Add ISR to record the following SEL to BMC.

| sensor type | sensor number      | event data                  | condition                                                                                          |
|-------------|--------------------|-----------------------------|----------------------------------------------------------------------------------------------------|
| C3h         | 56h(POWER_ERROR)   | 01FFFFh(SYS_PWROK_FAIL)     | asserted when PWRGD_CPU_LVC3 is low and FM_CPU_BIC_SLP_S3_N is high.                               |
| C9h         | 10h(SYSTEM_STATUS) | 00FFFFh(SYS_THERMAL_TRIP)   | asserted when FM_CPU_BIC_THERMTRIP_N falls                                                         |
| C9h         | 10h(SYSTEM_STATUS) | 02FFFFh(SYS_THROTTLE)       | asserted/deassert when FM_CPU_BIC_PROCHOT_LVT3_N falls/rises                                       |
| C9h         | 10h(SYSTEM_STATUS) | 05FFFFh(SYS_PMBUSALERT)     | asserted/deassert when IRQ_HSC_ALERT1_N falls/rises                                                |
| C9h         | 10h(SYSTEM_STATUS) | 06FFFFh(SYS_HSCTIMER)       | asserted/deassert when FM_HSC_TIMER rises/falls                                                    |
| C9h         | 10h(SYSTEM_STATUS) | 07FFFFh(SYS_FIRMWAREASSERT) | asserted/deassert when FAST_PROCHOT_N falls/rises                                                  |
| C9h         | 10h(SYSTEM_STATUS) | 0AFFFFh(SYS_VRWATCHDOG)     | asserted when PWRGD_CPU_LVC3 is low after FM_CPU_BIC_SLP_S3_N is high of 10 second.                |
| CBh         | 71h(VR_OCP)        |        byte 1: VR number<br>0 - PVDDCR_CPU0<br> 1 - PVDDCR_CPU1<br>2 - PVDD11_S3 <br>byte 2: FFh<br>byte 3: FFh       | asserted/deassert when PVDDCR_CPU0_BIC_OCP_N, PVDDCR_CPU1_BIC_OCP_N, PVDD11_S3_BIC_OCP_N fall/rise |
| CBh         | 72h(VR_ALERT)      |        byte 1: VR number and page<br>bit [7:1] - VR number<br>bit [0] - page<br>byte 2: VR STATUS_WORD byte 0<br>byte 3: VR STATUS_WORD byte 1        | asserted/deassert when PVDDCR_CPU0_PMALERT_N, PVDDCR_CPU1_PMALERT_N, PVDD11_S3_PMALERT_N fall/rise |
| CCh         | BDh(HDT_PRESENT)   | FFFFFFh | asserted/deassert when FM_DBP_PRESENT_N falls/rises                                                |

Pull Request resolved: #488

Test Plan: Build code: Pass

Reviewed By: williamspatrick

Differential Revision: D38708679

Pulled By: GoldenBug

fbshipit-source-id: 20950ba8ab263422df16165f7ee73fd04196db14
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Yi-Shum authored and facebook-github-bot committed Aug 15, 2022
1 parent 59c5f93 commit 2d020e9
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Showing 7 changed files with 512 additions and 396 deletions.
2 changes: 2 additions & 0 deletions common/service/ipmi/include/libipmi.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,8 @@
#define IPMI_OEM_SENSOR_TYPE_CPU_DIMM_HOT 0xC7
#define IPMI_OEM_SENSOR_TYPE_SYS_STA 0xC9
#define IPMI_OEM_SENSOR_TYPE_SYS_BOOT_STA 0xCA
#define IPMI_OEM_SENSOR_TYPE_VR 0xCB
#define IPMI_OEM_SENSOR_TYPE_HDT 0xCC

/* event/reading type, see IPMI spec 42.1, table 42-1 */
#define IPMI_EVENT_TYPE_THRESHOLD 0x01
Expand Down
79 changes: 0 additions & 79 deletions meta-facebook/yv35-hd/src/platform/plat_class.c
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,6 @@
#define I2C_DATA_SIZE 5
#define NUMBER_OF_ADC_CHANNEL 16
#define AST1030_ADC_BASE_ADDR 0x7e6e9000
#define ILIM_ADJUST_DEFAULT 0b001
#define ILIM_ADJUST_2OU_EXP 0b011

static uint8_t system_class = SYS_CLASS_1;
static uint8_t board_revision = 0x3F;
Expand Down Expand Up @@ -280,39 +278,6 @@ void init_platform_config()
if (cnt == ARRAY_SIZE(_1ou_card_mapping_table)) {
printf("Unknown the 1OU card type, the voltage of ADC channel-6 is %fV\n",
voltage);
} else if (_1ou_status.card_type == TYPE_1OU_RAINBOW_FALLS) {
if (hsc_module == HSC_MODULE_ADM1278) {
gpio_set(HSC_OCP_GPIO1_R, GPIO_HIGH);
} else if (hsc_module == HSC_MODULE_LTC4282) {
uint8_t ilim_adjust_data = 0;

tx_len = 1;
rx_len = 1;
memset(data, 0, I2C_DATA_SIZE);
data[0] = LTC4282_ILIM_ADJUST_OFFSET;
i2c_msg = construct_i2c_message(I2C_BUS5, LTC4282_ADDR,
tx_len, data, rx_len);
if (!i2c_master_read(&i2c_msg, retry)) {
ilim_adjust_data = i2c_msg.data[0];
} else {
printf("Failed to read ILIM_ADJUST from LTC4282\n");
}
/* Set ILIM to 15.625mV by writing 0b001 to bits[7:0] */
tx_len = 2;
rx_len = 0;
memset(data, 0, I2C_DATA_SIZE);
data[0] = LTC4282_ILIM_ADJUST_OFFSET;
data[1] = (ilim_adjust_data & 0x1f) | 0x20;
i2c_msg = construct_i2c_message(I2C_BUS5, LTC4282_ADDR,
tx_len, data, rx_len);
if (i2c_master_write(&i2c_msg, retry)) {
printf("Failed to set ILIM_ADJUST to LTC4282\n");
}
} else {
printf("Unsupported HSC module %d\n", hsc_module);
}
} else {
printf("Unsupported 1ou card type %d\n", _1ou_status.card_type);
}
}
}
Expand All @@ -339,49 +304,5 @@ void init_platform_config()
}
}

/* Set HSC OCP */
uint8_t ilim_adjust = ILIM_ADJUST_DEFAULT;
if (_2ou_status.present) {
if (hsc_module == HSC_MODULE_ADM1278) {
gpio_set(HSC_OCP_GPIO1_R, GPIO_LOW);
gpio_set(HSC_OCP_GPIO2_R, GPIO_LOW);
gpio_set(HSC_OCP_GPIO3_R, GPIO_HIGH);
} else if (hsc_module == HSC_MODULE_LTC4282) {
ilim_adjust = ILIM_ADJUST_2OU_EXP;
} else {
printf("Unsupported HSC module %d\n", hsc_module);
}
} else if ((!_1ou_status.present && !_2ou_status.present) ||
(_1ou_status.present && (_1ou_status.card_type == TYPE_1OU_RAINBOW_FALLS))) {
printf("Default HSC OCP setting\n");
} else {
printf("Unsupported configuration, 1ou card type %d\n", _1ou_status.card_type);
}

if (hsc_module == HSC_MODULE_LTC4282) {
uint8_t ilim_register_data = 0;

tx_len = 1;
rx_len = 1;
memset(data, 0, I2C_DATA_SIZE);
data[0] = LTC4282_ILIM_ADJUST_OFFSET;
i2c_msg = construct_i2c_message(I2C_BUS5, LTC4282_ADDR, tx_len, data, rx_len);
if (!i2c_master_read(&i2c_msg, retry)) {
ilim_register_data = i2c_msg.data[0];
} else {
printf("Failed to read ILIM_ADJUST from LTC4282\n");
}
/* Set OCP by writing ilim_adjust to bits[7:5] */
tx_len = 2;
rx_len = 0;
memset(data, 0, I2C_DATA_SIZE);
data[0] = LTC4282_ILIM_ADJUST_OFFSET;
data[1] = (ilim_register_data & 0x1f) | ((ilim_adjust << 5) & 0xe0);
i2c_msg = construct_i2c_message(I2C_BUS5, LTC4282_ADDR, tx_len, data, rx_len);
if (i2c_master_write(&i2c_msg, retry)) {
printf("Failed to set ILIM_ADJUST to LTC4282\n");
}
}

SAFE_FREE(data);
}
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