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Synthesis: Insert tie cells during synthesis #252

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merged 1 commit into from
Dec 19, 2023

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mtdudek
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@mtdudek mtdudek commented Dec 18, 2023

This commit adds following changes to the synthesis script:

  • defined all x values as 0s
  • split multi-bit nets to single bit ones
  • run extra optimization after x values are resolved.
  • map constant 0/1s to tap cells during synthesis. These steps are similar to the ORFS synthesis.

Sixth part of the #243

This commit adds following changes to the synthesis script:
* defined all `x` values as `0`s
* split multi-bit nets to single bit ones
* run extra optimization after `x` values are resolved.
* map constant 0/1s to tap cells during synthesis.
These steps are similar to the ORFS synthesis.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
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@mithro mithro left a comment

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LGTM.

@mithro mithro merged commit d184095 into hdl:main Dec 19, 2023
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@mtdudek mtdudek deleted the 52551-tie_logic_levels branch December 19, 2023 08:52
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2 participants