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Large missing features

• Memories
• External registers

Property Support Status

Please update the property support table as follows:

• Y - support is in
  • RHS - only on RHS assignment
  • LHS - only on LHS assignment
• NA - Not applicable for this generator
• FR - Feature Request

Name	Components	Type	Category	Support	Description
accesswidth	reg	longint unsigned	none		Specifies the minimum software access width operation that may be performed on the register.
activehigh	signal	boolean	none		Signal is active high (state of 1 means ON).
activelow	signal	boolean	none		Signal is active low (state of 0 means ON).
addressing	addrmap	addressingtype	none		Specifies how component addresses are to be inferred if not explicitly defined.
alignment	addrmap, regfile	longint unsigned	none		Specifies alignment of all instantiated components in the associated register file or address map.
anded	field	boolean	hw access	Y	Indicates an output signal shall be generated. Logical AND of all bits in field.
async	signal	boolean	none		Signal is asynchronous to the clock of the component.
bigendian	addrmap	boolean	none		Uses big-endian architecture in the address map.
bridge	addrmap	boolean	none		Defines the parent address map as being a bridge. This shall only be applied to the root address map which contains the different views of the sub address maps.
constraint_disable	constraint	boolean	none		Specifies whether to disable or enable constraints.
counter	field	boolean	counter	Y	Field implemented as a counter.
cpuif_reset	signal	boolean	none		Default signal to use for resetting the software interface logic. If cpuif_reset is not defined, this reverts to the default reset signal. This parameter only controls the CPU interface of a generated slave.
decr	field	instance reference	counter	Y	References the counter's decrement signal. Use to actually decrement the counter, i.e, the actual counter decrement is controlled by another component or signal (active high).
decrsaturate	field	boolean, bit, instance reference	counter	Y	Indicates the counter saturates in the decrementing direction.
decrthreshold	field	boolean, bit, instance reference	counter	Y	Indicates the counter has a threshold in the decrementing direction.
decrvalue	field	bit, instance reference	counter	Y	Decrement counter by specified value.
decrwidth	field	longint unsigned	counter	Y	Width of the interface to hardware to control decrementing the counter externally.
desc	ALL	string	doc	NA	Describes the component's purpose.
dontcompare	field	boolean, bit	verif	NA	Indicates the components read data shall be discarded and not compared against expected results.
dontcompare	addrmap, reg, regfile	boolean	none	NA	Indicates the components read data shall be discarded and not compared against expected results.
donttest	field	boolean, bit	verif	NA	Indicates the component should not be included in structural testing.
donttest	addrmap, reg, regfile	boolean	none	NA	Indicates the component should not be included in structural testing.
enable	field	instance reference	interrupt	Y	Defines an interrupt enable (the inverse of mask); i.e., which bits in an interrupt field are used to assert an interrupt.
encode	field	enum type reference	misc		Binds an enumeration to a field.
errextbus	addrmap, reg, regfile	boolean	none		The associated register, external regfile, or external addrmap has error input.
field_reset	signal	boolean	none		Default signal to use for resetting field implementations. If field_reset is not defined, this reverts to the default reset signal.
fieldwidth	field	longint unsigned	hw access	Y	Determines the width of all instances of the field
haltenable	field	instance reference	interrupt		Defines a halt enable (the inverse of haltmask); i.e., which bits in an interrupt field are set to de-assert the halt out.
haltmask	field	instance reference	interrupt		Defines a halt mask (the inverse of haltenable); i.e., which bits in an interrupt field are set to assert the halt out.
hdl_path	addrmap, reg, regfile	string	verif	NA	Assigns the RTL hdl_path.
hdl_path_gate	addrmap, reg, regfile	string	verif	NA	Assigns the gate-level hdl_path.
hdl_path_gate_slice	field, mem	string[]	verif	NA	Assigns a list of gate-level hdl_path.
hdl_path_slice	field, mem	string[]	verif	NA	Assigns a list of RTL hdl_path.
hw	field	accesstype	hw access	Y	Design's ability to sample/update a field.
hwclr	field	boolean, instance reference	hw access	Y	Hardware clear.
hwenable	field	instance reference	hw access	Y	Determines which bits may be updated after any write enables, hard- ware clears/sets or counter increment has been performed. Bits that are set to 1 will be updated.
hwmask	field	instance reference	hw access	Y	Determines which bits may be updated after any write enables, hard- ware clears/sets or counter increment has been performed. Bits that are set to 1 will not be updated.
hwset	field	boolean, instance reference	hw access	Y	Hardware set.
incr	field	instance reference	counter	Y	References the counter's increment signal. Use to actually increment the counter, i.e, the actual counter increment is controlled by another component or signal (active high).
incrsaturate	field	boolean, bit, instance reference	counter	Y	Indicates the counter saturates in the incrementing direction.
incrthreshold	field	boolean, bit, instance reference	counter	Y	Indicates the counter has a threshold in the incrementing direction.
incrvalue	field	bit, instance reference	counter	Y	Increment counter by specified value.
incrwidth	field	longint unsigned	counter	Y	Width of the interface to hardware to control incrementing the counter externally.
intr	field	boolean	interrupt	Y	Interrupt, part of interrupt logic for a register.
ispresent	ALL	boolean	none		Used to configure the activation of component instances. Setting ispresent to false causes the given component instance to be removed from the final specification.
littleendian	addrmap	boolean	none		Uses little-endian architecture in the address map.
lsb0	addrmap	boolean	none		Specifies register bit-fields in an address map are defined as N:0 versus 0:N. This property affects all fields in an address map. This is the default.
mask	field	instance reference	interrupt	Y	Defines an interrupt mask (the inverse of enable); i.e., which bits in an interrupt field are not used to assert an interrupt.
mementries	mem	longint unsigned	none		The number of memory entries.
memwidth	mem	longint unsigned	none		The memory entry bit width.
msb0	addrmap	boolean	none		Specifies register bit-fields in an address map are defined as 0:N versus N:0. This property affects all fields in an address map.
name	ALL	string	doc	NA	Specifies a more descriptive name
next	field	instance reference	misc	Y	The next value of the field
onread	field	onreadtype	sw access	Y	Read side-effect.
onwrite	field	onwritetype	sw access	Y	Write side-effect.
ored	field	boolean	hw access	Y	Indicates an output signal shall be generated. Logical OR of all bits in field.
overflow	field	boolean	counter	Y	Indicates an output signal shall be generated. Asserted when counter overflows or wraps.
paritycheck	field	boolean	misc		Indicates whether this field is to be checked by parity.
precedence	field	precedencetype	misc		Controls whether precedence is granted to hardware (hw) or software (sw) when contention occurs.
rclr	field	boolean	sw access	Y	Clear on read
regwidth	reg	longint unsigned	none		Specifies the bit-width of the register
reset	field	bit, instance reference	misc	Y	The reset value for the field when resetsignal is asserted.
resetsignal	field	instance reference	misc		Reference to the signal used to reset the field
rset	field	boolean	sw access	Y	Set on read
rsvdset	addrmap	boolean	none		The read value of all fields not explicitly defined is set to 1 if rsvdset is True; otherwise, it is set to 0.
rsvdsetX	addrmap	boolean	none		The read value of all fields not explicitly defined is unknown if rsvdsetX is True.
saturate	field	boolean, bit, instance reference	counter	Y	This is an alias of incrsaturate.
shared	reg	boolean	none		Defines a register as being shared in different address maps.
sharedextbus	addrmap, regfile	boolean	none		Forces all external registers to share a common bus.
signalwidth	signal	longint unsigned	none		Width of the signal.
singlepulse	field	boolean	sw access	Y	The field asserts for one cycle when written 1 and then clears back to 0 on the next cycle. This creates a single-cycle pulse on the hardware interface.
sticky	field	boolean	interrupt	Y	Defines the entire field as sticky; i.e., the value of the associated interrupt field shall be locked until cleared by software (write or clear on read).
stickybit	field	boolean	interrupt	Y	Defines each bit in a field as sticky (the default); i.e., the value of each bit in the associated interrupt field shall be locked until the individual bits are cleared by software (write or clear on read).
sw	field, mem	accesstype	sw access	Y	Programmer's ability to read/write a field.
swacc	field	boolean	sw access	Y	Indicates an output signal shall be generated. Assert when field is software accessed.
swmod	field	boolean	sw access	Y	Indicates an output signal shall be generated. Assert when field is modified by software (written or read with a set or clear side effect).
swwe	field	boolean, bit, instance reference	sw access	Y	Software write-enable. active high.
swwel	field	boolean, bit, instance reference	sw access	Y	Software write-enable. active low.
sync	signal	boolean	none		Signal is synchronous to the clock of the component.
threshold	field	boolean, bit, instance reference	counter	Y	This is an alias of incrthreshold.
underflow	field	boolean	counter	Y	Indicates an output signal shall be generated. Asserted when counter underflows or wraps.
we	field	boolean, instance reference	hw access	Y	Write-enable (active high).
wel	field	boolean, instance reference	hw access	Y	Write-enable (active low).
woclr	field	boolean	sw access	Y	Write one to clear
woset	field	boolean	sw access	Y	Write one to set
xored	field	boolean	hw access	Y	Indicates an output signal shall be generated. Logical XOR of all bits in field.