Fix bug where non-async flop generates async flop #564
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Description & Motivation
In #533 a bug was included along with implementation of the feature allowing the
asyncResetflag to be added toflopandFlipFlopwhich caused generated SystemVerilog to include an asynchronous reset, regardless of whetherasyncResetwas set to true or false.This PR fixes the bug and adds tests which check the functionality of non-async flops to ensure they are not asynchronously triggered in either ROHD or SystemVerilog simulation. This testing was missing in the original PR, which led to the escape.
Related Issue(s)
Related to #533
Testing
Added new tests which failed without the fix
Backwards-compatibility
No
Documentation
No