[firtool] Change scalarize-top-module option

Remove the -scalarize-top-module option to firtool (and the parser). Replace this with -scalarize-public-modules. This is done in preparation for FIRRTL 4.0.0. This is also largely unnecessary once FIRRTL 4.0.0 figures out how to attach the ABI to each public module. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
llvm · Nov 27, 2023 · 7b5be71 · 7b5be71
1 parent 9045ce5
commit 7b5be71
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diff --git a/include/circt/Dialect/FIRRTL/FIRParser.h b/include/circt/Dialect/FIRRTL/FIRParser.h
@@ -46,7 +46,7 @@ struct FIRParserOptions {
   /// This, along with numOMIRFiles provides structure to the buffers in the
   /// source manager.
   unsigned numAnnotationFiles;
-  bool scalarizeTopModule = false;
+  bool scalarizePublicModules = false;
   bool scalarizeExtModules = false;
 };
 

diff --git a/lib/Dialect/FIRRTL/Import/FIRParser.cpp b/lib/Dialect/FIRRTL/Import/FIRParser.cpp
@@ -4638,19 +4638,20 @@ ParseResult FIRCircuitParser::parseModule(CircuitOp circuit, bool isPublic,
       info.parseOptionalInfo() || parsePortList(portList, portLocs, indent))
     return failure();
 
-  auto circuitName = circuit.getName();
-  auto isMainModule = (name == circuitName);
+  // The main module is implicitly public.
+  isPublic |= name == circuit.getName();
+
   ArrayAttr annotations = getConstants().emptyArrayAttr;
   auto convention = Convention::Internal;
-  if (isMainModule && getConstants().options.scalarizeTopModule)
+  if (isPublic && getConstants().options.scalarizePublicModules)
     convention = Convention::Scalarized;
   auto conventionAttr = ConventionAttr::get(getContext(), convention);
   auto builder = circuit.getBodyBuilder();
   auto moduleOp = builder.create<FModuleOp>(info.getLoc(), name, conventionAttr,
                                             portList, annotations);
 
-  auto visibility = isMainModule || isPublic ? SymbolTable::Visibility::Public
-                                             : SymbolTable::Visibility::Private;
+  auto visibility = isPublic ? SymbolTable::Visibility::Public
+                             : SymbolTable::Visibility::Private;
   SymbolTable::setSymbolVisibility(moduleOp, visibility);
 
   // Parse the body of this module after all prototypes have been parsed. This

diff --git a/test/firtool/convention.fir b/test/firtool/convention.fir
@@ -1,7 +1,7 @@
-; RUN: firtool %s --format=fir --parse-only --scalarize-top-module=false --scalarize-ext-modules=false --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_NONE %s
-; RUN: firtool %s --format=fir --parse-only --scalarize-top-module=true  --scalarize-ext-modules=false --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_TOP  %s
-; RUN: firtool %s --format=fir --parse-only --scalarize-top-module=false --scalarize-ext-modules=true  --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_EXT  %s
-; RUN: firtool %s --format=fir --parse-only --scalarize-top-module=true  --scalarize-ext-modules=true  --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_BOTH %s
+; RUN: firtool %s --format=fir --parse-only --scalarize-public-modules=false --scalarize-ext-modules=false --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_NONE %s
+; RUN: firtool %s --format=fir --parse-only --scalarize-public-modules=true  --scalarize-ext-modules=false --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_TOP  %s
+; RUN: firtool %s --format=fir --parse-only --scalarize-public-modules=false --scalarize-ext-modules=true  --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_EXT  %s
+; RUN: firtool %s --format=fir --parse-only --scalarize-public-modules=true  --scalarize-ext-modules=true  --preserve-aggregate=all | FileCheck --check-prefix=SCALARIZE_BOTH %s
 
 ; Ensure that top module and ext modules are marked scalarized.
 
@@ -14,7 +14,7 @@ circuit Top :
     output port: UInt<8>[2]
     port[0] <= UInt<8>(0)
     port[1] <= UInt<8>(0)
-  
+
   ; SCALARIZE_NONE-NOT: attributes {convention = #firrtl<convention scalarized>}
   ; SCALARIZE_TOP-NOT:  attributes {convention = #firrtl<convention scalarized>}
   ; SCALARIZE_EXT:      attributes {convention = #firrtl<convention scalarized>}

diff --git a/test/firtool/refs-in-aggs.fir b/test/firtool/refs-in-aggs.fir
@@ -1,6 +1,6 @@
 ; Check this design makes it through firtool.
 ; RUN: firtool %s --no-dedup
-; RUN: firtool %s --no-dedup --preserve-aggregate=all --scalarize-top-module=false
+; RUN: firtool %s --no-dedup --preserve-aggregate=all --scalarize-public-modules=false
 
 ; Check parsing into open aggregates.
 ; RUN: circt-translate -import-firrtl -verify-diagnostics -split-input-file %s | circt-opt | FileCheck %s

diff --git a/test/firtool/spec/refs/define-flip-to-passive.fir b/test/firtool/spec/refs/define-flip-to-passive.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit Foo :
   ; SPEC EXAMPLE BEGIN

diff --git a/test/firtool/spec/refs/define-subelement.fir b/test/firtool/spec/refs/define-subelement.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit Foo:
   ; SPEC EXAMPLE BEGIN

diff --git a/test/firtool/spec/refs/define.fir b/test/firtool/spec/refs/define.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit Refs:
   ; SPEC EXAMPLE BEGIN

diff --git a/test/firtool/spec/refs/endpoints.fir b/test/firtool/spec/refs/endpoints.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit Top : %[[
 { "class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|Top>producer_debug"},

diff --git a/test/firtool/spec/refs/ext.fir b/test/firtool/spec/refs/ext.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 circuit MyExternalModuleWithRefs :
   ; SPEC EXAMPLE BEGIN
   extmodule MyExternalModuleWithRefs :

diff --git a/test/firtool/spec/refs/force_and_release.fir b/test/firtool/spec/refs/force_and_release.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit ForceAndRelease:
   ; SPEC EXAMPLE BEGIN

diff --git a/test/firtool/spec/refs/force_initial.fir b/test/firtool/spec/refs/force_initial.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 
 circuit ForceAndRelease:

diff --git a/test/firtool/spec/refs/force_nonpassive.fir b/test/firtool/spec/refs/force_nonpassive.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s -verify-diagnostics
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false -verify-diagnostics
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false -verify-diagnostics
 FIRRTL version 3.0.0
 
 circuit Top :

diff --git a/test/firtool/spec/refs/forwarding_refs_upwards.fir b/test/firtool/spec/refs/forwarding_refs_upwards.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 circuit Forward:
   ; SPEC EXAMPLE BEGIN
   extmodule Foo : ; XXX: module -> extmodule

diff --git a/test/firtool/spec/refs/forwarding_refs_upwards_narrow.fir b/test/firtool/spec/refs/forwarding_refs_upwards_narrow.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 circuit Forward :
   ; SPEC EXAMPLE BEGIN
   extmodule Foo :

diff --git a/test/firtool/spec/refs/in_ref_context.fir b/test/firtool/spec/refs/in_ref_context.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s -verify-diagnostics
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false -verify-diagnostics
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false -verify-diagnostics
 FIRRTL version 3.0.0
 ; expected-error @+27 {{input probes cannot be used}}
 ; expected-note @+19 {{input probe here}}

diff --git a/test/firtool/spec/refs/inference_reset_bad.fir b/test/firtool/spec/refs/inference_reset_bad.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s -verify-diagnostics
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false -verify-diagnostics
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false -verify-diagnostics
 ; XFAIL: *
 ; https://github.com/llvm/circt/issues/4813
 FIRRTL version 3.0.0

diff --git a/test/firtool/spec/refs/inference_reset_good.fir b/test/firtool/spec/refs/inference_reset_good.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit ResetInferGood :
   ; SPEC EXAMPLE BEGIN

diff --git a/test/firtool/spec/refs/inference_works.fir b/test/firtool/spec/refs/inference_works.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 ; NOT SPEC EXAMPLE
 FIRRTL version 3.0.0
 
@@ -16,4 +16,3 @@ circuit MinimumWidth :
     inst u of Uninferred
     connect u.x, x
     connect y, read(u.r)
-
diff --git a/test/firtool/spec/refs/invalid_in.fir b/test/firtool/spec/refs/invalid_in.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s --verify-diagnostics
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false --verify-diagnostics
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false --verify-diagnostics
 FIRRTL version 3.0.0
 circuit FooUser:
   ; Invalid, per spec

diff --git a/test/firtool/spec/refs/nested_refproducer.fir b/test/firtool/spec/refs/nested_refproducer.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 circuit RefProducer :
   ; SPEC EXAMPLE BEGIN

diff --git a/test/firtool/spec/refs/nosubaccess.fir b/test/firtool/spec/refs/nosubaccess.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 circuit NoSubAccessesWithProbes :
   extmodule Ext :
     output x : {a : Probe<UInt<2>[2]>, b : UInt<2>}[3]

diff --git a/test/firtool/spec/refs/probe_export_simple.fir b/test/firtool/spec/refs/probe_export_simple.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 circuit MyModule :
   ; SPEC EXAMPLE BEGIN
   module MyModule :
@@ -8,4 +8,3 @@ circuit MyModule :
 
     define r = probe(in)
     ; SPEC EXAMPLE END
-
diff --git a/test/firtool/spec/refs/read.fir b/test/firtool/spec/refs/read.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 
 circuit Foo :

diff --git a/test/firtool/spec/refs/read_subelement.fir b/test/firtool/spec/refs/read_subelement.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 
 circuit Foo :
@@ -17,4 +17,3 @@ circuit Foo :
     inst f of Foo
     connect x, read(f.p.b) ; indirectly access the probed data
   ; SPEC EXAMPLE END
-
diff --git a/test/firtool/spec/refs/read_subelement_add.fir b/test/firtool/spec/refs/read_subelement_add.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 
 circuit Foo :

diff --git a/test/firtool/spec/refs/unused_in.fir b/test/firtool/spec/refs/unused_in.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s -verify-diagnostics
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false -verify-diagnostics
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false -verify-diagnostics
 FIRRTL version 3.0.0
 circuit ForwardDownwardsTH :
   module ForwardDownwardsTH :

diff --git a/test/firtool/spec/refs/uturn.fir b/test/firtool/spec/refs/uturn.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s -verify-diagnostics
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false -verify-diagnostics
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false -verify-diagnostics
 FIRRTL version 3.0.0
 circuit UTurnTH:
   module UTurnTH:

diff --git a/test/firtool/spec/refs/when_c_force_initial.fir b/test/firtool/spec/refs/when_c_force_initial.fir
@@ -1,5 +1,5 @@
 ; RUN: firtool %s
-; RUN: firtool %s -preserve-aggregate=all -scalarize-top-module=false
+; RUN: firtool %s -preserve-aggregate=all -scalarize-public-modules=false
 FIRRTL version 3.0.0
 
 circuit WhenCForce :

diff --git a/tools/firtool/firtool.cpp b/tools/firtool/firtool.cpp
@@ -121,9 +121,9 @@ static cl::opt<InfoLocHandling> infoLocHandling(
     cl::init(InfoLocHandling::PreferInfo), cl::cat(mainCategory));
 
 static cl::opt<bool>
-    scalarizeTopModule("scalarize-top-module",
-                       cl::desc("Scalarize the ports of the top module"),
-                       cl::init(true), cl::cat(mainCategory));
+    scalarizePublicModules("scalarize-public-modules",
+                           cl::desc("Scalarize all public modules"),
+                           cl::init(true), cl::cat(mainCategory));
 
 static cl::opt<bool>
     scalarizeExtModules("scalarize-ext-modules",
@@ -339,7 +339,7 @@ static LogicalResult processBuffer(
     firrtl::FIRParserOptions options;
     options.infoLocatorHandling = infoLocHandling;
     options.numAnnotationFiles = numAnnotationFiles;
-    options.scalarizeTopModule = scalarizeTopModule;
+    options.scalarizePublicModules = scalarizePublicModules;
     options.scalarizeExtModules = scalarizeExtModules;
     module = importFIRFile(sourceMgr, &context, parserTimer, options);
   } else {