[Verif] disambiguate ctor (#8076)

llvm · Jan 13, 2025 · cdd3814 · cdd3814
1 parent c3c0b08
commit cdd3814
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/lib/Conversion/VerifToSV/VerifToSV.cpp b/lib/Conversion/VerifToSV/VerifToSV.cpp
@@ -44,8 +44,8 @@ struct PrintOpConversionPattern : public OpConversionPattern<PrintOp> {
                   ConversionPatternRewriter &rewriter) const override {
 
     // Printf's will be emitted to stdout (32'h8000_0001 in IEEE Std 1800-2012).
-    Value fdStdout = rewriter.create<hw::ConstantOp>(
-        op.getLoc(), APInt(32, 0x80000001, false));
+    Value fdStdout =
+        rewriter.create<hw::ConstantOp>(op.getLoc(), APInt(32, 0x80000001));
 
     auto fstrOp =
         dyn_cast_or_null<FormatVerilogStringOp>(op.getString().getDefiningOp());