Add unit test discovery and execution tool #7685
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fabianschuiki
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uenoku
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dtzSiFive
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maerhart
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| def FormalOp : VerifOp<"formal", [ | ||
| NoTerminator, RegionKindInterface, HasParent<"mlir::ModuleOp">, |
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Was HasParent dropped accidentally, or is there a motivation behind it?
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I saw that we don't really rely on this property anywhere. No passes or similar use this. So I thought drop this until it becomes necessary. Maybe we want to group formal tests? Not sure.
Add the `circt-test` tool. This tool is intended to be a driver for discovering and executing hardware unit tests in an MLIR input file. In this first draft circt-test simply parses an MLIR assembly or bytecode file and prints out a list of `verif.formal` operations. This is just a starting point. We'll want this tool to be able to also generate the Verilog code for one or more of the listed unit tests, run the tests through tools and collect results, and much more. From a user perspective, calling something like `circt-test design.mlirbc` should do a sane default run of all unit tests in the provided input. But the tool should also be useful for build systems to discover tests and run them individually.
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Ooo exciting ! Looking forward to seeing where this goes! |
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Add the
circt-testtool. This tool is intended to be a driver for discovering and executing hardware unit tests in an MLIR input file. In this first draft circt-test simply parses an MLIR assembly or bytecode file and prints out a list ofverif.formaloperations.This is just a starting point. We'll want this tool to be able to also generate the Verilog code for one or more of the listed unit tests, run the tests through tools and collect results, and much more. From a user perspective, calling something like
circt-test design.mlirbcshould do a sane default run of all unit tests in the provided input. But the tool should also be useful for build systems to discover tests and run them individually.