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Add fixes to mpuconf for STM32F7 series #2890

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Add fixes to mpuconf for STM32F7 series #2890

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fc84ecb
Add fixes to mpuconf
networkfusion Mar 2, 2024
e458a84
Merge branch 'main' into mpuconf-fixes
networkfusion Mar 3, 2024
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15 changes: 9 additions & 6 deletions targets/ChibiOS/ORGPAL_PALTHREE/nanoBooter/mcuconf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,18 +26,22 @@
#define STM32F7xx_MCUCONF
#define STM32F769_MCUCONF

/*
* General settings.
*/
#define STM32_NO_INIT FALSE

/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE FALSE
// #define STM32_NOCACHE_MPU_REGION MPU_REGION_6
// #define STM32_NOCACHE_RBAR 0x2004C000U
// #define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K

/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE TRUE
Expand Down Expand Up @@ -95,7 +99,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE

/*
* IRQ system settings.
Expand Down
15 changes: 9 additions & 6 deletions targets/ChibiOS/ORGPAL_PALTHREE/nanoCLR/mcuconf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,18 +26,22 @@
#define STM32F7xx_MCUCONF
#define STM32F769_MCUCONF

/*
* General settings.
*/
#define STM32_NO_INIT FALSE

/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE FALSE
// #define STM32_NOCACHE_MPU_REGION MPU_REGION_6
// #define STM32_NOCACHE_RBAR 0x2004C000U
// #define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K

/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE TRUE
Expand Down Expand Up @@ -95,7 +99,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE

/*
* IRQ system settings.
Expand Down
15 changes: 9 additions & 6 deletions targets/ChibiOS/ST_STM32F769I_DISCOVERY/nanoBooter/mcuconf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,18 +26,22 @@
#define STM32F7xx_MCUCONF
#define STM32F769_MCUCONF

/*
* General settings.
*/
#define STM32_NO_INIT FALSE

/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE FALSE
// #define STM32_NOCACHE_MPU_REGION MPU_REGION_6
// #define STM32_NOCACHE_RBAR 0x2004C000U
// #define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K

/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
Expand Down Expand Up @@ -95,7 +99,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE

/*
* IRQ system settings.
Expand Down
15 changes: 9 additions & 6 deletions targets/ChibiOS/ST_STM32F769I_DISCOVERY/nanoCLR/mcuconf.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -26,18 +26,22 @@
#define STM32F7xx_MCUCONF
#define STM32F769_MCUCONF

/*
* General settings.
*/
#define STM32_NO_INIT FALSE

/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE FALSE
// #define STM32_NOCACHE_MPU_REGION MPU_REGION_6
// #define STM32_NOCACHE_RBAR 0x2004C000U
// #define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K

/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
Expand Down Expand Up @@ -95,7 +99,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE

/*
* IRQ system settings.
Expand Down