Make SingleQubitCompare output registers directional
#6312
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| @@ -222,7 +222,15 @@ class SingleQubitCompare(infra.GateWithRegisters): | |||
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| @cached_property | |||
| def signature(self) -> infra.Signature: | |||
| return infra.Signature.build(a=1, b=1, less_than=1, greater_than=1) | |||
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Should BiQubitsMixer be updated too?
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I think so, but I'd recommend to open a separate issue in Qualtran. I haven't looked at the decomposition too closely, but I'm not sure if ancilla doesn't register doesn't need to be part of the signature at all or whether it should be a directional register like the target of an And gate.
Maybe @NoureldinYosri can clarify this on the separate issue and then we can send a PR to update it and it's usage. Also, it looks like we are not really using BiQubitsMixer(adjoint=True) anywhere.
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Ok. I'll bump my cirq version locally and see. This is good to merge.
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the Adjoint=True is used during the decomposition I believe.
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@tanujkhattar @fdmalone it should be directional like And
Fixes quantumlib/Qualtran#388
cc @fdmalone