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1. DREAMPlaceFPGA DREAMPlaceFPGA Public

   An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit

   C++ 71 18

2. ReGDS-Logic-Gate-Extraction ReGDS-Logic-Gate-Extraction Public

   A custom C++ routine to identify logic gates in the layout extracted netlist (SPICE) of digital circuits and generate gate-level Verilog netlist, in the presence of logic gate defintions from the s…

   C++ 27 10

3. aug-elfPlace aug-elfPlace Public

   aug-elfPlace is a wirelength-driven generalizable flat analytical FPGA placer, built on DREAMPlaceFPGA framework, that can target simplified Ultrascale and Stratix-IV FPGA architectures.

   C++ 2