[feature] Extended support for STM32H7 & rework of software reset

CMakeLists.txt

@@ -60,6 +60,11 @@ if (STLINK_HAVE_SYS_MMAN_H)
     add_definitions(-DSTLINK_HAVE_SYS_MMAN_H)
 endif()
 
+CHECK_INCLUDE_FILE(sys/time.h STLINK_HAVE_SYS_TIME_H)
+if (STLINK_HAVE_SYS_TIME_H)
+    add_definitions(-DSTLINK_HAVE_SYS_TIME_H)
+endif()
+
 CHECK_INCLUDE_FILE(unistd.h STLINK_HAVE_UNISTD_H)
 if (STLINK_HAVE_UNISTD_H)
     add_definitions(-DSTLINK_HAVE_UNISTD_H)
@@ -104,6 +109,7 @@ set(STLINK_HEADERS
         src/stlink-lib/md5.h
         src/stlink-lib/sg.h
         src/stlink-lib/usb.h
+        src/stlink-lib/helper.h
         )
 
 set(STLINK_SOURCE
@@ -114,6 +120,7 @@ set(STLINK_SOURCE
         src/stlink-lib/md5.c
         src/stlink-lib/sg.c
         src/stlink-lib/usb.c
+		src/stlink-lib/helper.c
         )
 
 if (WIN32)
@@ -132,6 +139,11 @@ if (WIN32)
         set(STLINK_SOURCE "${STLINK_SOURCE};src/win32/mmap.c")
         set(STLINK_HEADERS "${STLINK_HEADERS};src/win32/mmap.h")
     endif()
+
+    if (NOT STLINK_HAVE_SYS_TIME_H)
+        set(STLINK_SOURCE "${STLINK_SOURCE};src/win32/sys_time.c")
+        set(STLINK_HEADERS "${STLINK_HEADERS};src/win32/sys_time.h")
+    endif()
 endif ()
 
 ## Include test execution for test-targets for target Debug

doc/dev/developer.txt

@@ -300,7 +300,7 @@ Return:		-1 for error. 0 for success.
     int stlink_current_mode(stlink_t *sl);
     int stlink_force_debug(stlink_t *sl);
     int stlink_target_voltage(stlink_t *sl);
-    int stlink_set_swdclk(stlink_t *sl, uint16_t divisor);
+    int stlink_set_swdclk(stlink_t *sl, int freq_khz);
 
     int stlink_erase_flash_mass(stlink_t* sl);
     int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, uint32_t length, uint8_t eraseonly);

inc/backend.h

@@ -28,7 +28,7 @@
         int (*current_mode) (stlink_t * stl);
         int (*force_debug) (stlink_t *sl);
         int32_t (*target_voltage) (stlink_t *sl);
-        int (*set_swdclk) (stlink_t * stl, uint16_t divisor);
+        int (*set_swdclk) (stlink_t * stl, int freq_khz);
     } stlink_backend_t;
 
 #endif // STLINK_BACKEND_H_

inc/stlink.h

@@ -83,25 +83,6 @@ enum target_state {
 
 #define STLINK_V3_MAX_FREQ_NB            10
 
-/* Cortex Debug Control Block */
-#define DCB_DHCSR 0xE000EDF0
-#define DCB_DCRSR 0xE000EDF4
-#define DCB_DCRDR 0xE000EDF8
-#define DCB_DEMCR 0xE000EDFC
-
-/* DCB_DHCSR bit and field definitions */
-#define DBGKEY      (0xA05F << 16)
-#define C_DEBUGEN   (1 << 0)
-#define C_HALT      (1 << 1)
-#define C_STEP      (1 << 2)
-#define C_MASKINTS  (1 << 3)
-#define S_REGRDY    (1 << 16)
-#define S_HALT      (1 << 17)
-#define S_SLEEP     (1 << 18)
-#define S_LOCKUP    (1 << 19)
-#define S_RETIRE_ST (1 << 24)
-#define S_RESET_ST  (1 << 25)
-
 /* Map the relevant features, quirks and workaround for specific firmware version of stlink */
 #define STLINK_F_HAS_TRACE              (1 << 0)
 #define STLINK_F_HAS_SWD_SET_FREQ       (1 << 1)
@@ -242,6 +223,7 @@ void stlink_close(stlink_t *sl);
 int stlink_core_id(stlink_t *sl);
 int stlink_reset(stlink_t *sl);
 int stlink_jtag_reset(stlink_t *sl, int value);
+int stlink_soft_reset(stlink_t *sl, int halt_on_reset);
 int stlink_run(stlink_t *sl);
 int stlink_status(stlink_t *sl);
 int stlink_version(stlink_t *sl);
@@ -260,7 +242,7 @@ int stlink_step(stlink_t *sl);
 int stlink_current_mode(stlink_t *sl);
 int stlink_force_debug(stlink_t *sl);
 int stlink_target_voltage(stlink_t *sl);
-int stlink_set_swdclk(stlink_t *sl, uint16_t divisor);
+int stlink_set_swdclk(stlink_t *sl, int freq_khz);
 
 int stlink_erase_flash_mass(stlink_t* sl);
 int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, uint32_t length, uint8_t eraseonly);
@@ -303,6 +285,10 @@ int stlink_write_option_control_register1_32(stlink_t *sl, uint32_t option_contr
 int stlink_write_option_bytes(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t len);
 int stlink_fwrite_option_bytes(stlink_t *sl, const char* path, stm32_addr_t addr);
 
+int stlink_flashloader_start(stlink_t *sl, flash_loader_t *fl);
+int stlink_flashloader_write(stlink_t *sl, flash_loader_t *fl, stm32_addr_t addr, uint8_t* base, uint32_t len);
+int stlink_flashloader_stop(stlink_t *sl);
+
 #include <sg.h>
 #include <usb.h>
 #include <reg.h>

inc/stm32.h

@@ -10,9 +10,12 @@
 /* Cortex core ids */
 #define STM32VL_CORE_ID 0x1ba01477
 #define STM32F7_CORE_ID 0x5ba02477
+#define STM32H7_CORE_ID 0x6ba02477 // STM32H7 JTAG ID Code (RM0433 pg3065)
 
 /* Constant STM32 memory map figures */
 #define STM32_FLASH_BASE           ((uint32_t)0x08000000)
+#define STM32_F1_FLASH_BANK2_BASE  ((uint32_t)0x08080000)
+#define STM32_H7_FLASH_BANK2_BASE  ((uint32_t)0x08100000)
 #define STM32_SRAM_BASE            ((uint32_t)0x20000000)
 #define STM32_G0_OPTION_BYTES_BASE ((uint32_t)0x1FFF7800)
 #define STM32_G4_OPTION_BYTES_BASE ((uint32_t)0x1FFFF800)