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HW RAID 0

Baktiiar Kukanov edited this page Dec 11, 2016 · 7 revisions

###Summary In order to increase the RAID 0 speed, we decided to use hardware raid system. We need to design IP core which will stripe the data across the eMMC host controllers. We are planing to combine 2 eMMC Host Controllers into single one, where DMA's, command line's and data line's will be separate. Due to this we need to manage this 2 HC like single one with control block. One of the HC will be like master and most of the operation will be done by it.

###Requirements of HW RAID 0

  • Needed to initialize the eMMC card through the HW RAID 0 like one single device with big memory
  • Needed to organize the driver extended CSD reading from eMMC cards through data line, due to memory size increase needed to implement some logics where CSD will be recalculated
  • Command line response analyse (error giving card identification mostly)
  • Control block (reading block descriptor, addresses for DMA's)
  • Needed to implement some logics where will be updated super blocks

Content:

  • State Machine