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Baktiiar Kukanov edited this page Nov 10, 2016
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###Content:
- Pars board design
- SD/eMMC Host Controller
- HW RAID 0
eMMC Host Controller ver 3.0
- Pars board design
- Element layouts
-
AXI Host Controller for eMMC
* Control register map
- Summarise control register set
- Configuration register type
-
Detailed register description
- Argument2 reg
- Block Size reg
- Block Count reg
- Argument1 reg
- Transfer mode reg
- Command reg
- Response0 reg
- Response1 reg
- Response2 reg
- Response3 reg
- Present State reg
- Host control1 reg
- Clock control reg
- Timeout control reg
- Software reset reg
- Normal Interrupt status reg
- Error Interrupt status reg
- Normal Interrupt status enable reg
- Error Interrupt status enable reg
- Normal Interrupt signal enable reg
- Error Interrupt signal enable reg
- Auto CMD Error Status reg
- Capabilities reg
- ADMA System Address reg
- Host Control version reg * Advanced DMA
- Description
- ADMA work principles
- ADMA Implementation * AutoCMD23 feature
- Description
- The-feature-work-principles
- Feature implementation * Reference list * Performance tests