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jit(arm64): support for shl, shr, rotl, and rotr #230
jit(arm64): support for shl, shr, rotl, and rotr #230
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// Arm64 doesn't have rotate left instruction. | ||
// The shift amount needs to be converted to a negative number. | ||
c.applyRegisterToRegisterInstruction(neginst, x2.register, x2.register) |
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I adopted this way because I checked Go Assembly output of the bits.RotateLeft()
sample code described in the official documentation, and it looked like this:
...
0x0258 00600 (main.go:11) MOVD $15, R0
0x025c 00604 (main.go:11) MOVD $2, R1
0x0260 00608 (main.go:11) RORW R1, R0, R0
...
0x0130 00304 (main.go:10) MOVD $15, R0
0x0134 00308 (main.go:10) MOVD $-2, R1
0x0138 00312 (main.go:10) RORW R1, R0, R1
...
I think this is valid, but I'm not sure this is the best way.
I'd love to hear your comments!
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ok confirmed that NEG is actually used in register allocated case
func fooooo(x uint32, k int) uint32 {
return bits.RotateLeft32(x, k)
}
is compiled to
"".fooooo STEXT size=32 args=0x18 locals=0x0 funcid=0x0 leaf
0x0000 00000 (main.go:12) TEXT "".fooooo(SB), LEAF|NOFRAME|ABIInternal, $0-24
0x0000 00000 (main.go:12) FUNCDATA ZR, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)
0x0000 00000 (main.go:12) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)
0x0000 00000 (main.go:12) FUNCDATA $5, "".fooooo.arginfo1(SB)
0x0000 00000 (main.go:13) MOVD "".k+8(FP), R0
0x0004 00004 (main.go:13) NEG R0, R0
0x0008 00008 (main.go:13) MOVWU "".x(FP), R1
0x000c 00012 (main.go:13) RORW R0, R1, R0
0x0010 00016 (main.go:13) MOVW R0, "".~r2+16(FP)
0x0014 00020 (main.go:13) RET (R30)
0x0000 e0 0b 40 f9 e0 03 00 cb e1 0b 40 b9 20 2c c0 1a ..@.......@. ,..
0x0010 e0 1b 00 b9 c0 03 5f d6 00 00 00 00 00 00 00 00 ......_.........
Thank you for your efforts!
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LGTM but will leave it to someone else more familiar with assembly to answer the comment on rotl
Co-authored-by: Crypt Keeper <64215+codefromthecrypt@users.noreply.github.com>
Thanks a lot @summerwind! |
Signed-off-by: r8d8 <ckryvomaz@gmail.com>
Hello, Let me try to add more instruction support in the continuation of #225.
This PR adds support of
shl
,shr
,rotl
, androtr
instruction for Arm64 JIT.This might be a part of #187.