ayusdixit / Digital-ASIC-LAB Star 2 Code Issues Pull requests Verilog Codes for various Design pipeline multiplication verilog fifo uvm adder system-verilog verilog-hdl max-pooling sequence-detector one-detector reconfigurable-matrix-adder Updated Nov 24, 2023 SystemVerilog
NotZombieFood / CLA-vs-CRA Star 1 Code Issues Pull requests Compare the speeds of the Carry ripple adder and Carry-lookahead adder verilog systemverilog adder digital-design lookahead Updated Oct 17, 2017 SystemVerilog
hidrogencloride / verilog-halfAdder Star 1 Code Issues Pull requests Hardware Simulation using Icarus Verilog EDA Playground for a half adder circuit design and test bench. security design hardware verilog circuit adder testbench half halfadder Updated Mar 25, 2017 SystemVerilog
NikosDelijohn / ksa Star 1 Code Issues Pull requests A synthesizable and modular Kogge-Stone Adder (KSA) implementation in SystemVerilog. systemverilog adder integer-arithmetic kogge-stone-adder arithmetic-circuit register-transfer-level Updated Jun 5, 2024 SystemVerilog
s105063704 / Digital_Adder Star 0 Code Issues Pull requests This repository consists of some digital adders . adder Updated Oct 18, 2021 SystemVerilog