axi4-protocol
Here are 6 public repositories matching this topic...
RISCV CPU implementation in SystemVerilog
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Oct 8, 2024 - SystemVerilog
Introduction in Reconfigurable Computing (using reconfigurable Systems-on-Chip rSoC)
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Oct 13, 2020 - C++
This repo contains an implementation of Axi4 lite interface on system verilog. Verilator and Vivado tools are used .
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May 4, 2024 - SystemVerilog
This repository contains the implementation of AXI4-Lite interface protocol on system verilog for FPGA/ASIC communication. Modular codebase with example designs and testbench.
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May 4, 2024 - SystemVerilog
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