SystemVerilog,refactor: call skipWhite() at the end of skipPastMatch()

[hirooih]

This fix improves readability and prevents bugs showed in #2703.

I am working on similar other issues.

[codecov]

Codecov Report

Merging #2718 (96eaa20) into master (5a13631) will increase coverage by 0.00%.
The diff coverage is 100.00%.

@@           Coverage Diff           @@
##           master    #2718   +/-   ##
=======================================
  Coverage   86.99%   86.99%           
=======================================
  Files         185      185           
  Lines       39466    39462    -4     
=======================================
- Hits        34333    34330    -3     
+ Misses       5133     5132    -1     

Impacted Files	Coverage Δ
parsers/verilog.c	98.74% <100.00%> (+0.14%)	⬆️

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[coveralls]

Coverage increased (+0.001%) to 87.083% when pulling 96eaa20 on hirooih:sv-createPastMatch into 4a9f00a on universal-ctags:master.

[masatake]

LGTM.

[masatake]

@hirooih, if you need my review, please request reviewing explicitly via GitHub's web UI.
If changes are enough small or obvious, you don't need my review.

[hirooih]

@hirooih, if you need my review, please request reviewing explicitly via GitHub's web UI.
If changes are enough small or obvious, you don't need my review.

I got you.