SystemVerilog: fix ctags --list-kinds-full=SystemVerilog listing

[hirooih]

$ ./ctags --list-kinds-full=SystemVerilog
#LETTER NAME                                     ENABLED REFONLY NROLES MASTER DESCRIPTION
A       assert                                   yes     no      0      NONE   assertions (assert, assume, cover, restrict)
...
f       function                                 yes     no      0      NONE   functions
i       instanceinstances of module or interface yes     no      0      NONE   NO DESCRIPTION GIVEN
l       ifclass                                  yes     no      0      NONE   interface class
...
w       member                                   yes     no      0      NONE   struct and union members
$ 

The line for instance was broken due to a missing comma. It has been hidden since #2703.

[coveralls]

Coverage decreased (-0.002%) to 87.176% when pulling 58caa39 on hirooih:sv-broken-list-kinds into 6262ea6 on universal-ctags:master.

[codecov]

Codecov Report

Merging #2766 (58caa39) into master (e35c3bc) will increase coverage by 0.00%.
The diff coverage is n/a.

@@           Coverage Diff           @@
##           master    #2766   +/-   ##
=======================================
  Coverage   87.08%   87.09%           
=======================================
  Files         191      191           
  Lines       40793    40820   +27     
=======================================
+ Hits        35526    35553   +27     
  Misses       5267     5267           

Impacted Files	Coverage Δ
parsers/verilog.c	98.26% <ø> (ø)
main/kind.c	97.95% <0.00%> (-0.35%)	⬇️
optlib/inko.c	100.00% <0.00%> (ø)
main/read.c	96.20% <0.00%> (+<0.01%)	⬆️
main/parse.c	95.15% <0.00%> (+0.01%)	⬆️
parsers/automake.c	97.24% <0.00%> (+0.21%)	⬆️
main/selectors.c	78.67% <0.00%> (+0.47%)	⬆️

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