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Verilog validator #3791
Verilog validator #3791
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- fix issues reported by [svlint](https://github.com/dalance/svlint) - Intended errors still remain Signed-off-by: Hiroo HAYASHI <24754036+hirooih@users.noreply.github.com>
Codecov ReportPatch and project coverage have no change.
Additional details and impacted files@@ Coverage Diff @@
## master #3791 +/- ##
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Coverage 83.04% 83.04%
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Files 227 227
Lines 55201 55203 +2
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+ Hits 45841 45843 +2
Misses 9360 9360 ☔ View full report in Codecov by Sentry. |
misc/validators/validator-svlint
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# validator-svlint - validating Verilog/SystemVerilog input files with svlint | ||
# https://github.com/dalance/svlint | ||
# | ||
# Copyright (c) 2023 Masatake YAMATO |
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I think your name should be here.
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Other than the copyright notice, it looks good for me.
I will integrate this into the test running on CircleCI::fedora38.
- Use NONE for intensional fails. - Use KNOWN-INVALIDATION for fails by svlint. Signed-off-by: Hiroo HAYASHI <24754036+hirooih@users.noreply.github.com>
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@masatake san, Thank you for your review.
I also thought about this if I should fix this. I fixed it and merged this PR. |
@masatake san,
From #3787
Please review the validator functionality to ensure that it is being used as you intend.