Commits on Nov 14, 2024

1. arch: riscv: add macro to access hardware registers …

   Add macros to read / write hardware registers.
   
   Signed-off-by: Yong Cong Sin <ycsin@meta.com>
   Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
   (cherry picked from commit de3a845)

   

   ycsin authored and github-actions[bot] committed Nov 14, 2024
   Configuration menu

   • View commit details
   • Copy full SHA for 9af5275
   • Browse repository at this point

   Copy the full SHA

   9af5275 View commit details

   Browse the repository at this point in the history

2. arch: riscv: reset global pointer on exception …

   Reset the gp on exception entry from u-mode to protect the kernel
   against a possible rogue user thread.
   
   Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
   Signed-off-by: Yong Cong Sin <ycsin@meta.com>
   (cherry picked from commit e30db2d)

   

   ycsin authored and github-actions[bot] committed Nov 14, 2024
   Configuration menu

   • View commit details
   • Copy full SHA for 301edba
   • Browse repository at this point

   Copy the full SHA

   301edba View commit details

   Browse the repository at this point in the history

3. tests: arch: riscv: make sure that gp reg can't be corrupted …

   Add a test to make sure that the `gp` global pointer register used for
   relative addressing when `CONFIG_RISCV_GP` is enabled can't be
   corrupted by a rogue user thread.
   
   Signed-off-by: Yong Cong Sin <ycsin@meta.com>
   Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
   (cherry picked from commit 408c151)

   

   ycsin authored and github-actions[bot] committed Nov 14, 2024
   Configuration menu

   • View commit details
   • Copy full SHA for 4f73572
   • Browse repository at this point

   Copy the full SHA

   4f73572 View commit details

   Browse the repository at this point in the history