Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Add AMD PMC/U support #222

Merged
merged 5 commits into from
Aug 9, 2024
Merged

Add AMD PMC/U support #222

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
5 commits
Select commit Hold shift + click to select a range
411112c
Add AMD PMC/U support
lancelui-amzn Aug 6, 2024
b823522
clearer event labels, fixed l3 misses
lancelui-amzn Aug 7, 2024
5cc4e58
sum backend stall counters on milan
lancelui-amzn Aug 7, 2024
82c2f8f
rustfmt change
lancelui-amzn Aug 7, 2024
d1ee8e0
rename stall backend on milan
lancelui-amzn Aug 8, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 3 additions & 0 deletions src/data.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,9 @@ cfg_if::cfg_if! {
pub mod intel_perf_events;
pub mod intel_icelake_perf_events;
pub mod intel_sapphire_rapids_perf_events;
pub mod amd_perf_events;
pub mod amd_genoa_perf_events;
pub mod amd_milan_perf_events;
}
}
pub mod interrupts;
Expand Down
24 changes: 24 additions & 0 deletions src/data/amd_genoa_perf_events.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

static STALL_BACKEND_PKC: NamedTypeCtr = NamedTypeCtr {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This isn't PKC, this is a single event, it's just backend stalls.

perf_type: PerfType::RAW,
name: "Backend-Stalls",
config: 0x100001ea0,
};
static CYCLES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Cycles",
config: 0x0076,
};

lazy_static! {
pub static ref GENOA_CTRS: Vec<NamedCtr<'static>> = [
NamedCtr {
name: "stall_backend_pkc",
nrs: vec![STALL_BACKEND_PKC],
drs: vec![CYCLES],
scale: 167 //~= 1000/6
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

That is really weird, why this value instead of just 1000? The ones below for milan are just 1000.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Not sure, I think its from each cycle being able to dispatch 6 instructions? This scale was from our documentation and AMD documentation.

},
]
.to_vec();
}
35 changes: 35 additions & 0 deletions src/data/amd_milan_perf_events.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

static STALL_BACKEND_PKC1: NamedTypeCtr = NamedTypeCtr {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

not PKC

perf_type: PerfType::RAW,
name: "Backend-Stalls-1",
config: 0xf7ae,
};
static STALL_BACKEND_PKC2: NamedTypeCtr = NamedTypeCtr {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

not PKC

perf_type: PerfType::RAW,
name: "Backend-Stalls-2",
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Are there any better specifiers for these besides just -1 and -2?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Not sure, each one counts several backend stall types.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

If it's not documented what exactly each one counts, perhaps the better thing to do is add them together. That assumes there's not overlap in what each one counts.

Copy link
Contributor Author

@lancelui-amzn lancelui-amzn Aug 7, 2024 •
edited
Loading

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Talked with Geoff, the sum of the two is the total backend stalls. Pushed changes

config: 0x27af,
};
static CYCLES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Cycles",
config: 0x0076,
};

lazy_static! {
pub static ref MILAN_CTRS: Vec<NamedCtr<'static>> = [
NamedCtr {
name: "stall_backend_pkc1",
nrs: vec![STALL_BACKEND_PKC1],
drs: vec![CYCLES],
scale: 1000
},
NamedCtr {
name: "stall_backend_pkc2",
nrs: vec![STALL_BACKEND_PKC2],
drs: vec![CYCLES],
scale: 1000
},
]
.to_vec();
}
135 changes: 135 additions & 0 deletions src/data/amd_perf_events.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,135 @@
use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

// amd events
static INSTRUCTIONS: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Instructions",
config: 0x00c0,
};
static CYCLES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Cycles",
config: 0x0076,
};
static BRANCHES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Branches",
config: 0x00c3,
};
static L1_DATA: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L1-Data",
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Is this an L1 data access, or a L1 data miss?

In general a lot of these counters have names that are not specific enough. I haven't looked at our existing definitions, hopefully they aren't all like this.

config: 0xff44,
};
static L1_INSTRUCTIONS: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L1-Instructions",
config: 0x1060,
};
static L2: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L2",
config: 0x0964,
};
static L3: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L3",
config: 0x0843,
};
static STALL_FRONTEND_PKC: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Frontend-Stalls",
config: 0x00a9,
};
static INSTRUCTION_TLB: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Instruction-TLB",
config: 0x0084,
};
static INSTRUCTION_TLB_TW: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Instruction-TLB-TW",
config: 0x0f85,
};
static DATA_TLB: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Data-TLB",
config: 0xff45,
};
static DATA_TLB_TW: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Data-TLB-TW",
config: 0xf045,
};

lazy_static! {
pub static ref PERF_LIST: Vec<NamedCtr<'static>> = [
NamedCtr {
name: "ipc",
nrs: vec![INSTRUCTIONS],
drs: vec![CYCLES],
scale: 1
},
NamedCtr {
name: "branch-mpki",
nrs: vec![BRANCHES],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "data-l1-mpki",
nrs: vec![L1_DATA],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "inst-l1-mpki",
nrs: vec![L1_INSTRUCTIONS],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "l2-mpki",
nrs: vec![L2],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "l3-mpki",
nrs: vec![L3],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "stall_frontend_pkc",
nrs: vec![STALL_FRONTEND_PKC],
drs: vec![CYCLES],
scale: 1000
},
NamedCtr {
name: "inst-tlb-mpki",
nrs: vec![INSTRUCTION_TLB],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "inst-tlb-tw-mpki",
nrs: vec![INSTRUCTION_TLB_TW],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "data-tlb-mpki",
nrs: vec![DATA_TLB],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "data-tlb-tw-pki",
nrs: vec![DATA_TLB_TW],
drs: vec![INSTRUCTIONS],
scale: 1000
},
]
.to_vec();
}
17 changes: 14 additions & 3 deletions src/data/perf_stat.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,9 +17,10 @@ use std::sync::Mutex;
use crate::data::grv_perf_events;
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
use {
crate::data::intel_icelake_perf_events::ICX_CTRS, crate::data::intel_perf_events,
crate::data::intel_sapphire_rapids_perf_events::SPR_CTRS, crate::data::utils::get_cpu_info,
indexmap::IndexMap,
crate::data::amd_genoa_perf_events::GENOA_CTRS, crate::data::amd_milan_perf_events::MILAN_CTRS,
crate::data::amd_perf_events, crate::data::intel_icelake_perf_events::ICX_CTRS,
crate::data::intel_perf_events, crate::data::intel_sapphire_rapids_perf_events::SPR_CTRS,
crate::data::utils::get_cpu_info, indexmap::IndexMap,
};

pub static PERF_STAT_FILE_NAME: &str = "perf_stat";
Expand Down Expand Up @@ -140,6 +141,16 @@ impl CollectData for PerfStatRaw {
"Intel(R) Xeon(R) Platinum 8488C" => SPR_CTRS.to_vec(),
_ => Vec::new(),
};
} else if cpu_info.vendor == "AuthenticAMD" {
warn!("Event multiplexing may result in bad PMU data."); //TODO: mitigate bad PMU data on AMD instances
perf_list = amd_perf_events::PERF_LIST.to_vec();

/* Get Model specific events */
platform_specific_counter = match cpu_info.model_name.as_str() {
"AMD EPYC 9R14" => GENOA_CTRS.to_vec(),
"AMD EPYC 7R13 Processor" => MILAN_CTRS.to_vec(),
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Some processors may have different model name. For example, ""AMD EPYC 7R13 48-Core Processor" on c6a metal instances.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Are you saying that because you're planning on making changes here to do, for example, a substring or prefix match? Or are you saying it because you want to know whether it matters if metal works?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Just wanted to note it here. Have a prefix match for the first 13 characters and will push changes soon.

_ => Vec::new(),
};
} else {
return Err(PDError::CollectorPerfUnsupportedCPU.into());
}
Expand Down
Loading