Add AMD PMC/U support #222

lancelui-amzn · 2024-08-06T04:17:06Z

Description of changes:

Added AMD PMU event numbers and support in perf_stat

Testing:

Ran benchmarks on AMD milan and genoa family instances and compared output to results generated by perfrunbook and Intel/graviton based instances.
Example of ipc comparison between perfrunbook and aperf:

Note: We observed some incorrect data presumably from event multiplexing (up to 13 groups of 14 events). Values may be different than true counts due to this scaling, but trends remain accurate.

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

lancelui-amzn · 2024-08-06T14:50:02Z

src/data/perf_stat.rs

+                    /* Get Model specific events */
+                    platform_specific_counter = match cpu_info.model_name.as_str() {
+                        "AMD EPYC 9R14" => GENOA_CTRS.to_vec(),
+                        "AMD EPYC 7R13 Processor" => MILAN_CTRS.to_vec(),


Some processors may have different model name. For example, ""AMD EPYC 7R13 48-Core Processor" on c6a metal instances.

Are you saying that because you're planning on making changes here to do, for example, a substring or prefix match? Or are you saying it because you want to know whether it matters if metal works?

Just wanted to note it here. Have a prefix match for the first 13 characters and will push changes soon.

wash-amzn · 2024-08-07T12:54:18Z

src/data/amd_genoa_perf_events.rs

@@ -0,0 +1,24 @@
+use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};
+
+static STALL_BACKEND_PKC: NamedTypeCtr = NamedTypeCtr {


This isn't PKC, this is a single event, it's just backend stalls.

wash-amzn · 2024-08-07T12:55:07Z

src/data/amd_genoa_perf_events.rs

+            name: "stall_backend_pkc",
+            nrs: vec![STALL_BACKEND_PKC],
+            drs: vec![CYCLES],
+            scale: 167 //~= 1000/6


That is really weird, why this value instead of just 1000? The ones below for milan are just 1000.

Not sure, I think its from each cycle being able to dispatch 6 instructions? This scale was from our documentation and AMD documentation.

wash-amzn · 2024-08-07T12:55:16Z

src/data/amd_milan_perf_events.rs

@@ -0,0 +1,35 @@
+use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};
+
+static STALL_BACKEND_PKC1: NamedTypeCtr = NamedTypeCtr {


wash-amzn · 2024-08-07T12:55:21Z

src/data/amd_milan_perf_events.rs

+    name: "Backend-Stalls-1",
+    config: 0xf7ae,
+};
+static STALL_BACKEND_PKC2: NamedTypeCtr = NamedTypeCtr {


wash-amzn · 2024-08-07T12:56:32Z

src/data/amd_milan_perf_events.rs

+};
+static STALL_BACKEND_PKC2: NamedTypeCtr = NamedTypeCtr {
+    perf_type: PerfType::RAW,
+    name: "Backend-Stalls-2",


Are there any better specifiers for these besides just -1 and -2?

Not sure, each one counts several backend stall types.

If it's not documented what exactly each one counts, perhaps the better thing to do is add them together. That assumes there's not overlap in what each one counts.

Talked with Geoff, the sum of the two is the total backend stalls. Pushed changes

wash-amzn · 2024-08-07T12:57:57Z

src/data/amd_perf_events.rs

+};
+static L1_DATA: NamedTypeCtr = NamedTypeCtr {
+    perf_type: PerfType::RAW,
+    name: "L1-Data",


Is this an L1 data access, or a L1 data miss?

In general a lot of these counters have names that are not specific enough. I haven't looked at our existing definitions, hopefully they aren't all like this.

wash-amzn · 2024-08-07T13:01:32Z

src/data/perf_stat.rs

+                    /* Get Model specific events */
+                    platform_specific_counter = match cpu_info.model_name.as_str() {
+                        "AMD EPYC 9R14" => GENOA_CTRS.to_vec(),
+                        "AMD EPYC 7R13 Processor" => MILAN_CTRS.to_vec(),


Are you saying that because you're planning on making changes here to do, for example, a substring or prefix match? Or are you saying it because you want to know whether it matters if metal works?

wash-amzn · 2024-08-07T15:13:20Z

src/data/amd_perf_events.rs

        NamedCtr {
            name: "l3-mpki",
-            nrs: vec![L3],
+            nrs: vec![L1_ANY_FILLS_DRAM],
            drs: vec![INSTRUCTIONS],
            scale: 1000


Name says L3, nrs says L1. Are you sure this is right?

The counter is approximating L3 misses. "This is sorta l3 mpki, but ellides Prefetch misses from L2" - from our docs.

wash-amzn · 2024-08-08T15:28:17Z

src/data/amd_milan_perf_events.rs

@@ -19,17 +19,11 @@ static CYCLES: NamedTypeCtr = NamedTypeCtr {
 lazy_static! {
    pub static ref MILAN_CTRS: Vec<NamedCtr<'static>> = [
        NamedCtr {
-            name: "stall_backend_pkc1",
-            nrs: vec![STALL_BACKEND_1],
+            name: "stall_backend",


Shouldn't it still have the pkc in its name? Do whatever we do for other processors on this metric.

But having a metric without showing what its units/scale are seems incorrect.

Oops, you're right.

wash-amzn

Cupcakes had nothing to do with this approval ...

lancelui-amzn requested a review from a team as a code owner August 6, 2024 04:17

Add AMD PMC/U support

411112c

lancelui-amzn force-pushed the amd-pmu branch from 35b9867 to 411112c Compare August 6, 2024 04:33

lancelui-amzn commented Aug 6, 2024

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wash-amzn reviewed Aug 7, 2024

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clearer event labels, fixed l3 misses

b823522

wash-amzn reviewed Aug 7, 2024

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lancelui-amzn added 2 commits August 7, 2024 21:36

sum backend stall counters on milan

5cc4e58

rustfmt change

82c2f8f

wash-amzn reviewed Aug 8, 2024

View reviewed changes

rename stall backend on milan

d1ee8e0

wash-amzn approved these changes Aug 9, 2024

View reviewed changes

janaknat approved these changes Aug 9, 2024

View reviewed changes

wash-amzn merged commit 57242bb into aws:main Aug 9, 2024
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lancelui-amzn deleted the amd-pmu branch August 9, 2024 18:22

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Add AMD PMC/U support #222

Add AMD PMC/U support #222

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		@@ -0,0 +1,24 @@
		use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

		static STALL_BACKEND_PKC: NamedTypeCtr = NamedTypeCtr {

		@@ -0,0 +1,35 @@
		use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

		static STALL_BACKEND_PKC1: NamedTypeCtr = NamedTypeCtr {

Add AMD PMC/U support #222

Add AMD PMC/U support #222

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lancelui-amzn commented Aug 6, 2024 •

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