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v1.1

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@maciejprzybysz maciejprzybysz released this 10 Jan 13:04

v1.1

  • Fixed parts availability ISSUE #38
  • In FPGA_SDRAM.SchDoc NCP51145PDR2G changed to NCP51200MNTXG ISSUE #39
  • In EEM_Connectors_JTAG.SchDoc I2C enabling IC added ISSUE #40
  • In Power_Supplies.SchDoc IC14 enabled in EEMvariant, R278 changed to Schottky diode. ISSUE #43
  • R80 and R79 changed to 1k, added DIP switch ISSUE #44
  • In IC2 pins 6 and 7 disconected ISSUE #45
  • In IC10 GPB7 and GPB0 swapped ISSUE #46
  • Board shape change, left LEDs SMA mounting holes, right connectors, J10, J11 moved, SMA changed to delock #47
  • R3 changed to 1k ISSUE #48
  • Board extended from panel side, LD15 changed ISSUE #49
  • Migration from 100T to 200T ISSUE #51
  • C103 changed to 680u
  • 4.7uF caps in VCCINT increased amount from 6 to 12
  • 470nF caps in VCCINT increased amount from 8 to 14
  • 470nF caps in VCCBRAM increased amount to from 2 to 3
  • Pin delays in 200T added
  • FMC position fixed ISSUE #52
  • LVDS diffpairs adjusted
  • GND vias added near LVDS that changes reference
  • vias moved under L26
  • On L2 polygon under diff pairs changed (12V, 3V3)
  • Impedance control added
  • DDR trace width unified to meet impedance control requirements
  • Front panel 3D model updated
  • Variants updated
  • PDN simulation added