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FDCAN issues #34
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Related: Thoughts on a standalone fdCAN crate, like the bxCAN one? |
Implementation suggestions: Would be nice to get the raw ID from |
Ooh, good points, nicely spotted!
I'm all for it; I needed the fdcan support, so I made it for the g4 as a stopgap measure, but please go ahead and copy this into a stand-alone crate. I had that idea but this seemed like a good first stepping stone to me.
I'll add this
That also sounds like a good idea to me! |
For shared traits, there's already the new CAN traits that were recently merged into embedded-hal here, which came from the embedded-can crate with some slight modifications. Right now the latest embedded-hal version doesn't yet include the new CAN traits, but it should soon (perhaps even in a new 0.2 release); in any event it seems like using that trait for the ID types would be nice for cross compatibility. Having a separate fdcan crate which could be shared between the various HALs sounds good too, please shout if you need any help creating a repo in stm32-rs. |
I've made a standalone crate here. It includes a svd2rust-style PAC that applies to the FDCAN register mappings for G0 G4 L5 and H7, although unfortunately the H7 (and MP1) registers are different enough from everything else that I decided to use feature flags to switch between them. I would also support using either the embedded-can (probably the most practical at the moment) or embedded-hal traits. |
I think it's better to leave the traits out of it, in the style of Great work. |
I happened to spot some (potential) issues in the FDCAN support
TXBCR
TXBCF
andTXBTO
registers are bitmaps, not ordinals fdcan.rs#L1396TXBRP
register is a bitmap fdcan.rs#L1415ID_W
is missing its top bit txbuffer_element.rs#L130 See RM0440 rev5 44.3.6accept_all_into_fifo1()
has the action for FIFO0 filter.rs#L40 filter.rs#L83The text was updated successfully, but these errors were encountered: