Universal utility for programming FPGA

An Open Source configuration of the Arty platform

educational microarchitectures for risc-v isa

Learn how to create your own 32-bit system from scratch.

The documents used to supplement the implementation of the electronics module for Arty 2015.

109 Autumn - Digital Circuit Lab

A simple and scaleable Self Organizing Map implementation written in VHDL. Tested on ARTYA7-35T board.

HDL + Linux on Arty Z7-20

Stress test power subsystem of your Xilinx FPGA board

Ping Pong Game in VHDL

Personal FPGA Proyects mostly Xilinx / Vivado and Some Multisim

Simple implementation of SOC around PicoRV32 soft core.

Slaves for AXI-lite interface

Plateforme communautaire dédiée à l'entrepreneuriat et à l'artisanat français.

unknown art is where you can, hopefully, get in contact with persons, lovers, thinkers, minds or artists, all over the beautiful world.

This is a DDR3 SDRAM (MT41K128M16JT-125) sample project for Arty A7-35T FPGA board.

PicoRV32 - A Size-Optimized RISC-V CPU

This is an LED blinking example for Arty A7-35T FPGA board.