Port of the ZX Spectrum Next core to the Digilent Nexys A7-100T board.
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Mar 16, 2022 - VHDL
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digilent-nexys-4-board
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An FPGA implementation of Cummings' Asynchronous FIFO
fpga
rtl
verilog
xilinx
synthesis
systemverilog
fifo
uvm
xilinx-fpga
xilinx-vivado
digilent
hardware-description-language
nexys4ddr
universal-verification-methodology
fpga-programming
digilent-nexys-4-board
synthesizable
asynchronous-fifo
uvm-verification
register-transistor-level
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Apr 14, 2022 - SystemVerilog
This project explores real-time audio signal processing on a Digilent Nexys4-DDR FPGA board, capturing audio from a MEMS microphone, processing it with FFT, and transmitting results via Ethernet for potential applications in audio analysis and processing.
networking
fpga
hardware
dsp
signal
packet
fft
ethernet
packet-generator
pdm
digilent-nexys-4-board
ethernet-phy
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Dec 23, 2023 - Jupyter Notebook
Famous bubble trouble written in VHDL language.
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Feb 6, 2019 - VHDL
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