Framework to simplify porting MiSTer (and other) cores to the MEGA65
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Updated
Nov 16, 2024 - VHDL
Framework to simplify porting MiSTer (and other) cores to the MEGA65
Rom utilities for the TI-99/4a core of the MiSter FPGA project
mra_attract_mode aims to provide attract mode like functionality to the MiSTer FPGA Arcade core platform by cycling through and launching random Arcade games based on a defined time value in minutes.
Incomplete implementation of the Sega Dreamcast VMU in VHDL, based on the ElysianVMU Emulator
CAPCOM's 1943 arcade clone. (port of JT1943 core)
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