Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

Index of the fully open source process design kits (PDKs) maintained by Google.

SKY130 ReRAM and examples (SkyWater Provided)

Fully-differential asynchronous non-binary 12-bit SAR-ADC

Minimal SKY130 example with self-checking LVS, DRC, and PEX

This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Process Design Kit

GitHub Actions for usage with Google's 130nm manufacturable PDK for SkyWater Technology found @ https://github.com/google/skywater-pdk

PLL configuration generator for the Caravel management core

SRAM build space for SKY90FD provided by SkyWater.

This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out

Primitives for SKY90FD provided by SkyWater.

Standard cells for SKY90FD provided by SkyWater.

Standard cells for SKY90FD provided by Oklahoma State University.

IO and periphery cells for SKY90FD provided by SkyWater.

Mixed-mode silicon cochlea implementing wavelet processing in 130nm skywater process, embedded in efabless Caravel

Full Ubuntu setup for Analog and Digital design

Mixed-mode silicon cochlea implementing wavelet processing in 130nm skywater process