RISC-V Single and Double Precision Floating Point extension #303
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…dresses correctly so all implementations are left blank
… RISC-V implementation
FinnWilkinson
previously approved these changes
Dec 12, 2023
FinnWilkinson
previously approved these changes
Dec 12, 2023
JosephMoore25
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Dec 12, 2023
jj16791
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Dec 13, 2023
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In agreeance with @FinnWilkinson approval comment but the upcoming SimInfo PR will change those changes so best to re-discuss implementation on that PR or on the future CoreInstance PR.
jj16791
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Dec 13, 2023
JosephMoore25
previously approved these changes
Dec 13, 2023
FinnWilkinson
previously approved these changes
Dec 13, 2023
dANW34V3R
dismissed stale reviews from FinnWilkinson, JosephMoore25, and jj16791
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JosephMoore25
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jj16791
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Dec 13, 2023
FinnWilkinson
approved these changes
Dec 13, 2023
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This PR adds support for the F and D extensions as well as a dummy implementation of the Zicsr extension which is required by the former. The CSR extension cannot be completed as Capstone does not fully support disassembly of these instructions. Once a Capstone update is performed SimEng can be updated. Many spelling updates have also been performed.
Note: 8 tests are expected to fail as these rely on the correct rounding mode being set