Skip to content
Cedric Beauduffe edited this page Oct 16, 2023 · 2 revisions

2.1. Modulation

The D-BPSK modulation required by the sigfox network is not intrinsic to the radio part of the bc68f2150 but with a simultaneous access of the amplitude and frequency register it is possible to emulate it. With this D-BPSK emulation it becomes possible to pass the class 0 spectrum template of sigfox radio specification. This D-BPSK emulation consists of playing a amplitude LUT and process a frequency step when the amplitude LUT is at its lowest power level.

  • Frequency step must be played during a fixed time with a fixed frequency to accumulate a phase change of π (PSK like). Moreover his frequency step is alternatively positif and negative to balance spectrum template.

  • Amplitude values was empirically define to limit spread spectrum.

  • LUT element number and LUT element playing period are carefully chosen to be compliant with the MCU real time.

For easier implementation several parameters are linked together. The frequency step fixed time and LUT element playing period are the same, as well as the LUT element number and LUT element playing period are linked with the aim that total duration of the LUT lasts a full sigfox symbol (at 100bps or 600bps)

The table below shows all value selected for these différents parameter and how they are selected.

Parameter Value(s) 100bps Details 100bps Value(s) 600bps Details 600bps
Amplitude LUT List of output power Empirically determined value.
Frequency step 10Khz 10Khz is the minium of chipset datasheet
To accumulate a phase change of π : $T = 1/(2*Frequency Step)$
LUT element playing period 50µs $T = 1/(2*Frequency Step)$
$=1/(2 * 10)=50µs$
LUT element 200 $LUT element=Symbole Time/LUT element Playing Period$
$=10ms/50µs=200$

2.2. Library

This implementation example integrate the sigfox ep library through a git submodule. As the bc68f2150 is an low cost transmitter, a few specific code optimisation flag of the sigfox ep library are available to define/undefine in the project. These optimisation flags allows to reduced the memory footprint (RAM and ROM) in order to keep more place for your future application. In this example all flags are defined but can be modified according to your custom application.

The table below shows the different flags value supported with by this implementation example and the settled value in the project ( firmware_detail section show where this value are set in project ).

Flag name Value Project settled value
RCx undefined / defined RC1
APPLICATION_MESSAGES undefined / defined defined
CONTROL_KEEP_ALIVE_MESSAGE undefined undefined
BIDIRECTIONAL undefined undefined
ASYNCHRONOUS undefined undefined
LOW_LEVEL_OPEN_CLOSE undefined undefined
REGULATORY undefined undefined
LATENCY_COMPENSATION undefined / defined undefined
SINGLE_FRAME undefined / defined undefined
UL_BIT_RATE_BPS undefined / 100 / 600 100
TX_POWER_DBM_EIRP undefined / <tx_power_dbm_eirp> undefined
T_IFU_MS undefined / <t_ifu_ms> undefined
T_CONF_MS undefined undefined
UL_PAYLOAD_SIZE undefined / <ul_payload_size> undefined
CRC_HW undefined / defined undefined
MESSAGE_COUNTER_ROLLOVER 128 / 256 / 512 / 1024 / 2048 / 4096 4096
PARAMETERS_CHECK undefined / defined undefined
CERTIFICATION undefined / defined undefined
PUBLIC_KEY_CAPABLE undefined / defined undefined
VERBOSE undefined / defined undefined
ERROR_CODES undefined / defined undefined
ERROR_STACK undefined undefined