An N-bit counter module written in SystemC, VHDL and Verilog
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Updated
Oct 20, 2017 - VHDL
An N-bit counter module written in SystemC, VHDL and Verilog
Example of hardware trojan in a router detected with formal property verification
This library contains simple hardware designs in VHDL and SystemVerilog. It will be expanded to include common synchronizers and encryption hardware.
Debug screen VGA core for SchoolMIPS or nanoFOX
Deluxe RISC processor
Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
RTL implementation of FPGA accelerator using TFlite delegate mechanism.
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simple demo hardware code for implement access to ST7789 LCD display from FPGA
This is my implementation of a Sampler using the ARTY A7 35T developement board by Digilent.
Hardware acceleration of edge detection algorithm
A fully automated testbench for microcontroller CPU CISC
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