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add RAM32X1D inference #33

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wants to merge 43 commits into from
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add RAM32X1D inference #33

wants to merge 43 commits into from

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Breaks things.

litghost and others added 30 commits October 23, 2018 13:12
@litghost
xilinx: Add explicit carry techmap for vpr.
9eadccb 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@mithro @litghost
techlibs/xilinx: LUT6 doesn't exist.
c75770f 
LUT6 is actually two LUT5s and a MUX.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Working artix7 carry chains on VPR.
37d36af 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@mithro
Adding WIP note.
e7cfd68
@litghost
Fix formatting.
67fd1fa 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Merge pull request #2 from litghost/xilinx-vpr-carry-chains
1d62203 
Working 7-series carry chains on VPR
@litghost
Update DRAM models.
5fa9556 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Carry fixes.
088e8c8 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Add support for various DRAM modes.
3e1dd58 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Rename techmap to ensure order in eblif so that VPR packer works nicely.
4596bf5 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Most DRAM modes working.
9f0cd50 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Fix assorted errors.
9332eca 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Working sim and add stubs for DRAMs.
3400c52 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Add FF INIT.
2dc44dc 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Use explicit initial statements for RAMs.
a3e64fd 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Remove dead-end models.
c6f41dd 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@mithro
Merge pull request #5 from litghost/vpr-dram
f340adf 
Changes to support 7-series VPR flow
@litghost
Correct map entries for some FF's
c834dee 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@mithro
Merge pull request #6 from litghost/correct_map
b6119fa 
Correct map entries for some FF's
@mkurc-ant
Added correct techmap for Xilinx 7-series primitives. Modified flow o…
f48c450 
…f the "synth_xilinx" macro. Updated manual accordingly.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@mkurc-ant
Refactored techmap definition for Vivado and VPR. Modified "synth_xil…
6a5f5ad 
…inx" flow accordingly.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@mkurc-ant
Updated help text in synth_xilinx.cc
c70c1e0 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@mkurc-ant
Updated reference manual
9855a09 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@mkurc-ant
Replaced 4 spaces to tabs.
de7c405 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@mkurc-ant
Unified LUT flow for Vivado and VPR
ea9d46c 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@litghost
Merge branch 'master' into master+wip
4a4dc76
@mithro
Merge pull request #9 from litghost/update_yosys_with_setundef
79eca4e 
Update yosys with setundef
@mkurc-ant
Added negedge sensitive FFs recognized by Vivado, also to the VPR flow.
5eacb96 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
@litghost
Merge branch 'fix_reduce_on_ff' into master+wip
cf1a2c6
@litghost
Merge pull request #10 from litghost/master+wip
ec7f99f 
Merge WREDUCE fix to Symbiflow branch
litghost and others added 13 commits February 26, 2019 10:05
@litghost
Merge pull request #8 from antmicro/xilinx_ffmap
4c6936e 
Moved techmaps from Yosys to SymbiFlow
@litghost
Disable RAM32X1D synthesis due to f4pga/f4pga-arch-defs#409
c3de28b 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Merge pull request #11 from litghost/disable_ram32x1d_synthesis
48bfa03 
Disable RAM32x1D synthesis
@litghost
Merge remote-tracking branch 'yosyshq/master' into master+wip
8d6e920 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Merge pull request #12 from litghost/master+wip
7a22a5a 
Sync with YosysHQ
@mithro
Merge pull request #13 from YosysHQ/master
98104b3 
merge "YosysHQ/yosys" into master+wip
@litghost
Merge yosyshq/master back into master+wip.
4efcd3b 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Merge pull request #15 from litghost/update_master
12a8e09 
Merge yosyshq/master back into master+wip.
@litghost
Temporarily disable RAMB36 synthesis.
bcc77f1 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
@litghost
Merge pull request #16 from litghost/disable_ramb36_until_supported
22eaab1 
Temporarily disable RAMB36 synthesis.
@litghost
Merge branch 'master' into master+wip
8784672
@litghost
Merge pull request #21 from YosysHQ/master
2c7e254 
Sync master+wip with upstream
@HackerFoo
add RAM32X1D inference
8f99354
@HackerFoo HackerFoo requested a review from litghost June 12, 2019 00:57
@HackerFoo HackerFoo mentioned this pull request Jun 12, 2019
Open
@litghost litghost mentioned this pull request Jun 12, 2019
Open
2 tasks
@litghost litghost added this to To do in XC7 Timing burn down Jun 12, 2019
@litghost litghost moved this from To do to Done in XC7 Timing burn down Jun 12, 2019
@litghost litghost moved this from Done to To do in XC7 Timing burn down Jun 12, 2019
@HackerFoo HackerFoo closed this May 19, 2020
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@HackerFoo @litghost @mithro @mkurc-ant