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Minutes20160928

Robert Jordens edited this page Oct 9, 2017 · 3 revisions

9/28 ARTIQ Hardware meeting

people: John, Joe, Greg, Sebastien, Robert (all by google hangout)

minutes: Joe

TOPIC #1 : rehash discussion from Monday morning when Greg was absent

TOPIC #2 : discussion of how to use github to organize the project

  • agreement that tasks should be atomic; we will use github structure to assign tasks and determine task interdependencies

TOPIC #3 : what are tasks needed for project to complete?

  • Greg will make long list from perspective by WUT, deadline? post on Friday
  • schematic format? PDF and Expedition Viewer
  • move schematics to github… Expedition files are mostly text files… binary files are OK says Robert

TOPIC #4 : Britton rehashes physicist discussion from Monday

TOPIC #5 : WUT update

  • Greg will have Sayma and Metlino schematics draft done this week
  • Things that need to be answered? Bottlenecks?
    • m-labs supplies FPGA clocking guidance
    • RTM connector clock

TOPIC #6 : which license to use for hardware?

  • CERN OHWR license is advocated by Robert, Sebastien and Greg
    • Specific proposed license is CERN OHL v1.2 (link)
    • This is like GPL3… others who distribute the hardware are obligated to contribute their changes to the community
  • Does the license permit combination with proprietary IP on the same IP? This has not been resolved by the CERN community so far. There is an unresolved conflict between NAT and CERN. Parts of PCB are removed by Greg prior to publishing.
  • What about using ASICS which are closed design?
    • Can I use ASICS which are available only after signing an NDA?
    • Could build and use an analog mezzanine with a different license.
    • A "module" does not inherit the license. Including castellated modules. Greg describes the copyright statement he's put on hardware in the past. Unclear which license he's talking about.
  • Other options for license include: TAPR OHL
  • Who would own copyright to the schematics and board layouts?
    • Do we want a "sign-off" similar to that used by ARTIQ? (link)
    • Can the copyright holder choose a new license in the future if GPL3 is elected in the past?
  • What license for gateware?
    • Robert proposes to use GPL3 or later
    • If a commercial company wants to build proprietary RTIO module how could this be distributed closed source?
    • Robert points out that Xilinx toolchain permits combining IP from various sources into a single .bit file. Compiling the bitfile must in this case be performed by the customer. The GPL3 gateware components would be distributed with ARTIQ and the proprietary gateware would be distributed independently over a different channel.
    • Where is this discussed on the public internet?
  • discussion of ARTIQ license
    • All ARTIQ Python experiments import... from artiq.experiment import *
    • Do all scientists ARTIQ Python programs fall under the GPL3?
    • Robert and Sebastien say "no experiments would not fall under GPL3"
    • "Inheritance doesn't mean you're building a derived work," says Robert.

Tasks

  • Joe post minutes to mailing list.
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