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FPGA and SPI Flash programmers
LiteX relies on several external tools to load the FPGA bitstream in SRAM or flash it in SPI Flash. This page provide information to install them.
OpenOCD is used in LiteX to load bitstream in SRAM or flash SPI-Flash on most of the suported Xilinx/Lattice devices. Please use and install our fork of OpenOCD for the boards using the OpenOCD programmer:
git clone https://github.com/enjoy-digital/openocd
cd openocd
./bootstrap
./configure --enable-ftdi
make
sudo make install
openFPGALoader is an awesome FPGA loader tool developed by @trabucayre that supports most of the boards used by the open-FPGA communities (and also the more exotic ones!). We are relying on it in LiteX for an increasing number of boards (Gowin, Efinix boards) and already switched to it for some ECP5 boards. You can use upstream openFPGALoader with LiteX:
apt-get install libftdi1-2 libftdi1-dev libhidapi-hidraw0 libhidapi-dev libudev-dev cmake pkg-config make g++
git clone https://github.com/trabucayre/openFPGALoader
cd openFPGALoader
mkdir build
cd build
cmake ../
make
sudo make install
Have a question or want to get in touch? Our IRC channel is #litex at irc.libera.chat.
- Welcome to LiteX
- LiteX's internals
- How to
- Create a minimal SoC-TODO
- Add a new Board-TODO
- Add a new Core-WIP
- Add a new CPU-WIP
- Reuse-a-(System)Verilog,-VHDL,-Amaranth,-Spinal-HDL,-Chisel-core
- Use LiteX on the Acorn CLE 215+
- Load application code the CPU(s)
- Use Host Bridges to control/debug a SoC
- Use LiteScope to debug a SoC
- JTAG/GDB Debugging with VexRiscv CPU
- JTAG/GDB Debugging with VexRiscv-SMP, NaxRiscv and VexiiRiscv CPUs
- Document a SoC
- How to (Advanced)