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Run Linux On Your SoC
There are already various possibilities to run Linux on a LiteX SoC or with LiteX's components:
- Have an FPGA board with 32MB of RAM and want to test Linux on it?
- Want to study/explore a RISC-V Linux capable SoC?
- Want to create a full autonomous SoC with LiteX and its peripherals (SPI, I2C, SDCard, FrameBuffer, etc...) managed by Linux?
Linux-on-LiteX-VexRiscv project demonstrates how to create a Linux capable SoC with VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU written in Spinal HDL. A SoC around the VexRiscv CPU is created using LiteX as the SoC builder and LiteX's cores written in Migen Python DSL (LiteDRAM, LiteEth, LiteSDCard). All the components used to create the SoC are open-source and the flexibility of Spinal HDL/Migen allow targeting easily very various FPGA devices/boards: Lattice, Altera, Xilinx, Microsemi FPGAs with SDRAM/DDR/DDR2/DDR3/DDR4 RAMs, RMII/MII/RGMII/1000BASE-X Ethernet PHYs. On Lattice ECP5 FPGAs, the open source toolchain allows creating full open-source SoC with open-source cores and toolchain!
This project demonstrates how high level HDLs (Spinal HDL, Migen) enable new possibilities and complement each other. Results shown there are the results of a productive collaboration between open-source communities.ant to test easily control LiteX cores.
With recent improvements on VexRiscv SMP and SDCard support, it can even boot Linux from reset in just a few seconds, as demonstrated on the Arty A7.
Adding the Rocket Chip (64-bit RISC-V CPU) to the LiteX ecosystem, this project is capable of booting a nearly unmodified 64-bit upstream Linux kernel (with only the LiteEth network driver currently patched in).
Targeted toward the ECP5-5G-Versa and the TrellisBoard (but also known to work on the Nexys 4 DDR), the ultimate goal is to boot a Linux distro (e.g., Fedora), and use native riscv64 builds of the Libre FPGA toolchain (yosys/trellis/nextpnr) to build the underlying FPGA-based computer's own bitstream!
For the latest details, check out http://www.contrib.andrew.cmu.edu/~somlo/BTCP.
The Mor1kx CPU was one of the first CPU supported in LiteX (alongs with LM32), before the RISC-V CPUs invasion :) It's still a very good CPU and was the first one to boot Linux with LiteX. More information to boot Linux on it with LiteX can be found on the LiteX Buildenv's wiki.
The BlackParrot CPU support has been added recently to LiteX and Linux demonstrated on it in Linux-On-LiteX-BlackParrot project:
https://www.youtube.com/watch?v=npeDkfEMsoI&feature=youtu.be
The Microwatt CPU is supported by LiteX but not yet capable of booting Linux directly when integrated in LiteX.
The Boot Linux on Microwatt blog post demonstrates how to boot Linux on the Microwatt CPU. It does this by pulling together a number of cores from multiple sources, including a few LiteX based cores without using the full LiteX SoC builder.
By choosing to not use the LiteX SoC builder, this approach is unable to take advantage of many of the nicest features in the LiteX ecosystem and isolates itself from other efforts like the OpenRISC1000 and RISC-V efforts (VexRISC-V / Rocket / BlackParrot / more in future).
This approach does demonstrate that LiteX based cores can be integrated directly into existing more traditional flows like any other traditional IP core and a user is not forced to use LiteX for the integration. This example uses the LiteDRAM memory controller generator to create the DRAM controller and initialization code to be included in the VHDL based SoC.
Have a question or want to get in touch? Our IRC channel is #litex at irc.libera.chat.
- Welcome to LiteX
- LiteX's internals
- How to
- Create a minimal SoC-TODO
- Add a new Board-TODO
- Add a new Core-WIP
- Add a new CPU-WIP
- Reuse-a-(System)Verilog,-VHDL,-Amaranth,-Spinal-HDL,-Chisel-core
- Use LiteX on the Acorn CLE 215+
- Load application code the CPU(s)
- Use Host Bridges to control/debug a SoC
- Use LiteScope to debug a SoC
- JTAG/GDB Debugging with VexRiscv CPU
- JTAG/GDB Debugging with VexRiscv-SMP, NaxRiscv and VexiiRiscv CPUs
- Document a SoC
- How to (Advanced)